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Results 11 - 15 of 15 for ORR (0.27 sec)
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test/codegen/math.go
// wasm:"F64Copysign" sink64[0] = math.Copysign(a, b) // amd64:"BTSQ\t[$]63" // s390x:"LNDFR\t",-"MOVD\t" (no integer load/store) // ppc64x:"FCPSGN" // riscv64:"FSGNJD" // arm64:"ORR", -"AND" sink64[1] = math.Copysign(c, -1) // Like math.Copysign(c, -1), but with integer operations. Useful // for platforms that have a copysign opcode to see if it's detected.
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Apr 04 15:24:29 UTC 2024 - 6.2K bytes - Viewed (0) -
test/codegen/rotate.go
i++ } // combined arithmetic and rotate on arm64 func checkArithmeticWithRotate(a *[1000]uint64) { // arm64: "AND\tR[0-9]+@>51, R[0-9]+, R[0-9]+" a[2] = a[1] & bits.RotateLeft64(a[0], 13) // arm64: "ORR\tR[0-9]+@>51, R[0-9]+, R[0-9]+" a[5] = a[4] | bits.RotateLeft64(a[3], 13) // arm64: "EOR\tR[0-9]+@>51, R[0-9]+, R[0-9]+" a[8] = a[7] ^ bits.RotateLeft64(a[6], 13) // arm64: "MVN\tR[0-9]+@>51, R[0-9]+"
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Mar 07 14:57:07 UTC 2024 - 6K bytes - Viewed (0) -
src/runtime/sys_plan9_arm.s
MULLU R1,R3,(R6,R5) // R5:R6:R7 = R1:R2 * R3 MOVW $0,R7 MULALU R2,R3,(R7,R6) // unscale by discarding low 32 bits, shifting the rest by 29 MOVW R6>>29,R6 // R6:R7 = (R5:R6:R7 >> 61) ORR R7<<3,R6 MOVW R7>>29,R7 // subtract (10**9 * sec) from nsec to get nanosecond remainder MOVW $1000000000, R5 // 10**9 MULLU R6,R5,(R9,R8) // R8:R9 = R6:R7 * R5 MULA R7,R5,R9,R9
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Apr 29 14:15:04 UTC 2021 - 7K bytes - Viewed (0) -
test/codegen/bits.go
a[1] = ^(y ^ z) // arm64:`EON\t`,-`XOR` a[2] = x ^ ^z // arm64:`EON\t`,-`EOR`,-`MVN` return n ^ (m ^ 0xffffffffffffffff) } func op_orn(x, y uint32) uint32 { // arm64:`ORN\t`,-`ORR` return x | ^y } // check bitsets func bitSetPowerOf2Test(x int) bool { // amd64:"BTL\t[$]3" return x&8 == 8 } func bitSetTest(x int) bool { // amd64:"ANDL\t[$]9, AX"
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Jun 07 19:02:52 UTC 2024 - 7.8K bytes - Viewed (0) -
src/crypto/md5/md5block_arm.s
ROUND3(Rb, Rc, Rd, Ra, 2, 23, Rc3) // a += (c^(b|^d)) + X[index] + const // a = a<<shift | a>>(32-shift) + b #define ROUND4(Ra, Rb, Rc, Rd, index, shift, Rconst) \ MVN Rd, Rt0 ; \ ORR Rb, Rt0 ; \ EOR Rc, Rt0 ; \ MOVW (index<<2)(Rdata), Rt1 ; \ ADD Rt1, Rt0 ; \ ADD Rconst, Rt0 ; \ ADD Rt0, Ra ; \ ADD Ra@>(32-shift), Rb, Ra ; MOVM.IA.W (Rtable), [Rc0,Rc1,Rc2,Rc3]
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Mar 04 17:29:44 UTC 2024 - 8.8K bytes - Viewed (0)