TEXT    ·atanhAsm(SB), NOSPLIT, $0-16
	FMOVD   x+0(FP), F0
	MOVD    $·atanhrodataL10<>+0(SB), R5
	LGDR    F0, R1
	WORD    $0xC0393FEF //iilf  %r3,1072693247
	BYTE    $0xFF
	BYTE    $0xFF
	SRAD    $32, R1
	WORD    $0xB9170021 //llgtr %r2,%r1
	MOVW    R2, R6
	MOVW    R3, R7
	CMPBGT  R6, R7, L2
	WORD    $0xC0392FFF //iilf  %r3,805306367
	BYTE    $0xFF
	BYTE    $0xFF
	MOVW    R2, R6
	MOVW    R3, R7
	CMPBGT  R6, R7, L9

	SBBQ CX, CX		// save CF

	ADDQ $1, SI		// i++
	SUBQ $1, DI		// n--
	JG L2			// if n > 0 goto L2

E2:	NEGQ CX
	MOVQ CX, c+72(FP)	// return c
	RET


// func addVW(z, x []Word, y Word) (c Word)
TEXT ·addVW(SB),NOSPLIT,$0
	MOVQ z_len+8(FP), DI
	CMPQ DI, $32
	JG large
	MOVQ x+24(FP), R8
	MOVQ y+48(FP), CX	// c = y
	MOVQ z+0(FP), R10

	MOVQ $0, SI		// i = 0

// On PowerPC it is larger, to cover three more reserved words:
// the compiler word, the link editor word, and the TOC save word.
const MinFrameSize = _MinFrameSize

// StackAlign is the required alignment of the SP register.
// The stack must be at least word aligned, but some architectures require more.

         word_index++) {
      uint64 word = storage_[word_index];
      while (word != 0) {
        uint64 only_lowest_bit_set = word & -word;
        // The number of trailing zeros in a non-zero word is the index of the
        // least significant 1.
        int bit_index = absl::countr_zero(word);
        if (!func(DeviceId(word_index * kWordSize + bit_index))) {
          return;

// On PowerPC it is larger, to cover three more reserved words:
// the compiler word, the link editor word, and the TOC save word.
const MinFrameSize = goarch.MinFrameSize

// StackAlign is the required alignment of the SP register.
// The stack must be at least word aligned, but some architectures require more.

	push {r4, r5, r6, r7, r8, r9, r10, r11, ip, lr}
	mov r4, r0
	mov r5, r1
	mov r0, r2

	// Because the assembler might target an earlier revision of the ISA
	// by default, we encode BLX as a .word.
	.word 0xe12fff35 // blx r5 // setg(g)
	.word 0xe12fff34 // blx r4 // fn()

	pop {r4, r5, r6, r7, r8, r9, r10, r11, ip, pc}


#ifdef __ELF__
.section .note.GNU-stack,"",%progbits

class GUtilTest extends Specification {
    static sep = File.pathSeparator

    def convertStringToCamelCase() {
        expect:
        toCamelCase(null) == null
        toCamelCase("") == ""
        toCamelCase("word") == "Word"
        toCamelCase("twoWords") == "TwoWords"
        toCamelCase("TwoWords") == "TwoWords"
        toCamelCase("two-words") == "TwoWords"
        toCamelCase("two.words") == "TwoWords"

        result.add(sb.toString());
        // lines
        for (String line : lines) {
            sb.setLength(0);
            String[] words = S_FILTER.split(line);
            for (String word : words) {
                if (sb.length() >= remainder - word.length() - (sb.length() > 0 ? 1 : 0)) {
                    repeat(sb, ' ', remainder - sb.length());
                    result.add(BOX_CHAR + " " + sb + " " + BOX_CHAR);

	"strings"
)

// A BitField is a bit-field in a 32-bit word.
// Bits are counted from 0 from the MSB to 31 as the LSB.
type BitField struct {
	Offs uint8 // the offset of the left-most bit.
	Bits uint8 // length in bits.
	// This instruction word holding this field.
	// It is always 0 for ISA < 3.1 instructions. It is
	// in decoding order. (0 == prefix, 1 == suffix on ISA 3.1)
	Word uint8
}

func (b BitField) String() string {

	word := uint32(v) << ((uaddr & 3) * 8) // little endian
	for {
		old := *addr32
		if Cas(addr32, old, old|word) {
			return
		}
	}
}

//go:nosplit
func And8(addr *uint8, v uint8) {
	// Align down to 4 bytes and use 32-bit CAS.
	uaddr := uintptr(unsafe.Pointer(addr))
	addr32 := (*uint32)(unsafe.Pointer(uaddr &^ 3))
	word := uint32(v) << ((uaddr & 3) * 8)    // little endian