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Results 21 - 30 of 68 for conv_2d (0.23 sec)
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tensorflow/compiler/mlir/quantization/tensorflow/tests/insert_quantized_functions.mlir
// CHECK-NOT: func private @internal_conv2d_fn // CHECK-NOT: func private @internal_matmul_fn // CHECK: func private @quantized_conv2d_with_bias_fn // CHECK-SAME: tf_quant.quantized_ops = ["Conv2D", "BiasAdd"] // CHECK: func private @quantized_conv2d_with_bias_and_relu_fn // CHECK: func private @quantized_conv2d_with_bias_and_relu6_fn // CHECK: func private @quantized_conv2d_fn
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Tue Aug 29 01:13:58 UTC 2023 - 3.3K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/experimental/tac/transforms/device_transform_patterns.h
PatternRewriter& rewriter) const override; }; // Ensure bias for conv2d op. struct EnsureBiasForConv2d : public OpRewritePattern<TFL::Conv2DOp> { using OpRewritePattern<TFL::Conv2DOp>::OpRewritePattern; LogicalResult matchAndRewrite(TFL::Conv2DOp conv_op, PatternRewriter& rewriter) const override; }; // Pad slice to 4d.
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Mar 03 16:37:16 UTC 2022 - 4.3K bytes - Viewed (0) -
tensorflow/compiler/mlir/quantization/tensorflow/passes/quantized_function_library_xla_weight_only.mlir
parameters[ {"quantized_ops": ["MatMul"], "internal_func_name": "internal_matmul_fn"}, {"quantized_ops": ["Conv2D"], "internal_func_name": "internal_conv2d_fn"}, {"quantized_ops": ["DepthwiseConv2D"], "internal_func_name": "internal_depthwise_conv2d_fn"}, {"quantized_ops": ["Conv3D"], "internal_func_name": "internal_conv3d_fn"}, {"quantized_ops": ["BatchMatMul"], "internal_func_name": "internal_batch_matmul_fn"} ]
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Fri Mar 03 15:43:38 UTC 2023 - 7K bytes - Viewed (0) -
tensorflow/compiler/mlir/quantization/tensorflow/tests/add_quantization_unit_loc.mlir
%2 = "tf.Cast"(%1) {Truncate = false} : (tensor<1x3x2x2xbf16>) -> tensor<1x3x2x2xf32> %3 = "tf.IdentityN"(%2) {device = ""} : (tensor<1x3x2x2xf32>) -> tensor<1x3x2x2xf32> return %3 : tensor<1x3x2x2xf32> // CHECK: tf.Conv2D // CHECK-SAME: loc(callsite("Model/conv2d@conv2d_with_valid_loc"("Conv2D") at "QuantizationUnit({{.*}})")) }
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Tue Oct 03 02:39:10 UTC 2023 - 3.6K bytes - Viewed (0) -
tensorflow/compiler/mlir/quantization/tensorflow/tests/lift_quantizable_spots_as_functions_xla_selective_quantization.mlir
%1 = "tf.Conv2D"(%0, %cst) {data_format = "NHWC", dilations = [1, 1, 1, 1], explicit_paddings = [], padding = "SAME", strides = [1, 1, 2, 1], use_cudnn_on_gpu = true} : (tensor<1x3x4x3xf32>, tensor<2x3x3x2xf32>) -> tensor<1x3x2x2xf32> loc(fused["Conv2D:", "Model/conv2d"]) %2 = "tf.IdentityN"(%1) {device = ""} : (tensor<1x3x2x2xf32>) -> tensor<1x3x2x2xf32>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Mon Oct 30 06:52:55 UTC 2023 - 6.8K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/layout_optimization_to_nchw.mlir
%4 = "tf.Transpose"(%2, %3) : (tensor<1x32x32x8xf32>, tensor<4xi32>) -> tensor<1x8x32x32xf32> // Check that Conv2D computed in NCHW format, and all redundant transpose // operations removed from the function. // CHECK: %[[CONV:[0-9]*]] = "tf.Conv2D"(%arg0, %arg1) // CHECK-SAME: data_format = "NCHW" // CHECK-SAME: -> tensor<1x8x32x32xf32> // CHECK: return %[[CONV]]
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Mar 24 05:47:26 UTC 2022 - 1.3K bytes - Viewed (0) -
tensorflow/compiler/mlir/quantization/tensorflow/ops/tf_op_quant_spec.cc
if (function_name.contains("with_bias")) { spec->biases_params[2] = {{0, 1}, quant::GetUniformQuantizedTypeForBias}; } } else if (function_name.contains("conv2d")) { spec->coeff_op_quant_dim[1] = 3; if (function_name.contains("with_bias")) { spec->biases_params[2] = {{0, 1}, quant::GetUniformQuantizedTypeForBias}; }
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Apr 25 16:01:03 UTC 2024 - 6.3K bytes - Viewed (0) -
tensorflow/compiler/mlir/quantization/tensorflow/tests/fake_quant_e2e_xla.mlir
return %3 : tensor<?x?x?x2xf32> } // CHECK-LABEL: func @conv_with_dynamic_shape // The Conv2D should not be quantized since it has dynamic channel. // CHECK: "tf.Conv2D" // CHECK-SAME: (tensor<?x?x?x?xf32>, tensor<2x3x3x2xf32>) -> tensor<?x?x?x2xf32>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Mon Oct 30 06:52:55 UTC 2023 - 7.2K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/layout_optimization_layout_assignment_to_nchw.mlir
// CHECK: %[[ARG_PERM:.*]] = "tf.Const"() <{value = dense<[0, 3, 1, 2]> : tensor<4xi64>}> // CHECK: %[[ARG_TRANSPOSE:[0-9]*]] = "tf.Transpose"(%arg0, %[[ARG_PERM]]) // CHECK: %[[CONV2D:[0-9]*]] = "tf.Conv2D"(%[[ARG_TRANSPOSE]], %arg1) // CHECK-SAME: data_format = "NCHW" // CHECK-SAME: dilations = [1, 4, 2, 3] // CHECK-SAME: explicit_paddings = [1, 2, 7, 8, 3, 4, 5, 6] // CHECK-SAME: padding = "EXPLICIT"
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Mon Oct 30 06:52:55 UTC 2023 - 9K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/layout_optimization_layout_assignment_gpu_cc_70.mlir
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Tue Jun 21 08:41:18 UTC 2022 - 8.5K bytes - Viewed (0)