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tensorflow/compiler/mlir/tensorflow/transforms/gpu_fusion.cc
rewriter.replaceOp(batch_norm, op->getResults()); // Depending on the case, we may fuse the add, the relu, or both. if (!add_op || add_op.getZ().hasOneUse()) { // We fuse the Relu only if the add has a single use, otherwise we only // fuse the add itself. op->setAttr("activation_mode", rewriter.getStringAttr("Relu")); rewriter.replaceOp(relu_op, op->getResult(0)); } if (add_op) {
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Nov 03 12:35:38 UTC 2022 - 5.2K bytes - Viewed (0) -
tensorflow/compiler/mlir/tfrt/tests/analysis/testdata/test.mlir
%cpu = corert.get_op_handler %ch "cpu" %0 = corert.executeop(%cpu) "tf.Relu"(%arg0) { T = f32 } : 1 %arg1 = tfrt_fallback_async.corert_tensorhandle_to_fallback_tensor %arg1_th {_tfrt_cost = 1 : i64, device = "/CPU:0"} : (!corert.tensorhandle) -> (!tfrt_fallback.tf_tensor) %1 = tfrt_fallback_async.executeop key(0) cost(100) device("/CPU:0") "tf.Relu"(%arg1) { T = f32 } : 1 tfrt.return
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Dec 29 18:20:20 UTC 2022 - 496 bytes - Viewed (0) -
tensorflow/compiler/mlir/quantization/tensorflow/tests/fake_quant_e2e_xla.mlir
// CHECK: %[[cast:.*]] = "tf.Cast"(%[[sub]]) <{Truncate = false}> : (tensor<1x3x2x2xi32>) -> tensor<1x3x2x2xf32> // CHECK: %[[dequant1:.*]] = "tf.Mul"(%[[cast]] // CHECK: %[[relu:.*]] = "tf.Relu"(%[[dequant1]] // CHECK: %[[clamped:.*]] = "tf.Minimum"(%[[relu]] // CHECK: %[[rescale1:.*]] = "tf.Mul"(%[[cast]] // CHECK: %[[add2:.*]] = "tf.AddV2"(%[[rescale1]] // CHECK: %[[maximum2:.*]] = "tf.Maximum"(%[[add2]]
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Mon Oct 30 06:52:55 UTC 2023 - 7.2K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/experimental/tac/tests/compute-cost.mlir
%1 = "tfl.mul"(%0, %arg1) {fused_activation_function = "RELU", tac.device = "CPU"} : (tensor<10x10x10xf32>, tensor<10xf32>) -> tensor<10x10x10xf32> func.return %1 : tensor<10x10x10xf32> } // ----- // CHECK: tac.cost = 0x4B673001
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Mar 24 05:29:10 UTC 2022 - 4.1K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/tests/flatbuffer2mlir/basic_lstm.mlir
// CHECK-LABEL: @main
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu May 02 09:41:17 UTC 2024 - 1.1K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/graphdef2mlir/function-func-attr.pbtxt
op: "custom_embedding_matmul" } library { function { signature { name: "custom_relu" } attr { key: "_implements" value { func { name: "tensorflow.relu" } } } } function { signature { name: "custom_embedding_matmul" } attr { key: "_implements" value { func {
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Tue Aug 01 20:09:54 UTC 2023 - 1.3K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/experimental/tac/tests/get-op-cost.mlir
%0 = "tfl.add"(%arg0, %arg1) {fused_activation_function = "RELU", tac.device = "CPU"} : (tensor<10x10x10xf32>, tensor<10xf32>) -> tensor<10x10x10xf32> // CHECK: tac.cost = 1.000000e+03 %1 = "tfl.mul"(%0, %arg1) {fused_activation_function = "RELU", tac.device = "CPU"} : (tensor<10x10x10xf32>, tensor<10xf32>) -> tensor<10x10x10xf32> func.return %1 : tensor<10x10x10xf32> } // -----
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Mar 24 05:29:10 UTC 2022 - 5.7K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/layout_optimization_to_nhwc.mlir
%14 = "tf.AddV2"(%10, %12) : (tensor<?x256x56x56xf32>, tensor<?x256x56x56xf32>) -> tensor<?x256x56x56xf32> %15 = "tf.Relu"(%14) : (tensor<?x256x56x56xf32>) -> tensor<?x256x56x56xf32> // CHECK: %[[ADD:[0-9]*]] = "tf.AddV2"(%[[BATCH_NORM1]], %[[BATCH_NORM2]]) // CHECK: %[[RELU:[0-9]*]] = "tf.Relu"(%[[ADD]]) // Reduce spatial dimensions %16 = "tf.Mean"(%15, %1) : (tensor<?x256x56x56xf32>, tensor<2xi32>) -> tensor<?x256xf32>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Mon Oct 30 06:52:55 UTC 2023 - 7.3K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/device_assignment.mlir
// CHECK: device = "cpu" %2 = "tf.Relu"(%1) {T = f32, _output_shapes = ["tfshape$dim { size: 3 } dim { size: 3 }"], device = "cpu"} : (tensor<3x3xf32>) -> tensor<3x3xf32> // CHECK: device = "gpu" %3 = "tf.Relu"(%2) {T = f32, _output_shapes = ["tfshape$dim { size: 3 } dim { size: 3 }"]} : (tensor<3x3xf32>) -> tensor<3x3xf32> func.return %3 : tensor<3x3xf32>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Mar 24 05:47:26 UTC 2022 - 924 bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/tests/end2end/conv_2d_nchw.pbtxt
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Fri Dec 03 03:26:13 UTC 2021 - 3.7K bytes - Viewed (0)