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Results 11 - 12 of 12 for XORL (0.02 sec)
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src/internal/runtime/atomic/atomic_386.s
MOVQ val+4(FP), M0 MOVQ M0, (AX) EMMS // This is essentially a no-op, but it provides required memory fencing. // It can be replaced with MFENCE, but MFENCE was introduced only on the Pentium4 (SSE2). XORL AX, AX LOCK XADDL AX, (SP) RET // void ·Or8(byte volatile*, byte); TEXT ·Or8(SB), NOSPLIT, $0-5 MOVL ptr+0(FP), AX MOVB val+4(FP), BX LOCK ORB BX, (AX) RET
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Mar 25 19:53:03 UTC 2024 - 6.5K bytes - Viewed (0) -
src/runtime/sys_windows_amd64.s
LEAQ m_tls(CX), DI MOVQ CX, g_m(DX) MOVQ DX, g(DI) CALL runtime·settls(SB) // clobbers CX CALL runtime·stackcheck(SB) // clobbers AX,CX CALL runtime·mstart(SB) POP_REGS_HOST_TO_ABI0() XORL AX, AX // return 0 == success RET // set tls base to DI TEXT runtime·settls(SB),NOSPLIT,$0 MOVQ runtime·tls_g(SB), CX MOVQ DI, 0(CX)(GS) RET TEXT runtime·nanotime1(SB),NOSPLIT,$0-8
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Feb 19 07:24:08 UTC 2024 - 8.4K bytes - Viewed (0)