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Results 1 - 10 of about 10,000 for s$ (0.05 sec)

  1. src/cmd/asm/internal/asm/testdata/arm.s

    	EOR.S	R0<<28, R1, R2       // 002e31e0
    	EOR.S	R0->28, R1, R2       // 402e31e0
    	EOR.S	R0@>28, R1, R2       // 602e31e0
    	EOR	R0<<28, R1           // 001e21e0
    	EOR	R0>>28, R1           // 201e21e0
    	EOR	R0->28, R1           // 401e21e0
    	EOR	R0@>28, R1           // 601e21e0
    	EOR.S	R0<<28, R1           // 001e31e0
    	EOR.S	R0>>28, R1           // 201e31e0
    	EOR.S	R0->28, R1           // 401e31e0
    	EOR.S	R0@>28, R1           // 601e31e0
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Dec 15 20:51:01 UTC 2023
    - 69K bytes
    - Viewed (0)
  2. src/math/big/arith_386.s

    L8:	MOVL AX, DX		// w = w1
    	MOVL -4(SI)(BX*4), AX	// w1 = x[i-1]
    	SHLL CX, AX, DX		// w<<s | w1>>ŝ
    	MOVL DX, (DI)(BX*4)	// z[i] = w<<s | w1>>ŝ
    	SUBL $1, BX		// i--
    	JG L8			// i > 0
    
    	// i <= 0
    X8a:	SHLL CX, AX		// w1<<s
    	MOVL AX, (DI)		// z[0] = w1<<s
    	RET
    
    X8b:	MOVL $0, c+28(FP)
    	RET
    
    
    // func shrVU(z, x []Word, s uint) (c Word)
    TEXT ·shrVU(SB),NOSPLIT,$0
    	MOVL z_len+4(FP), BP
    	SUBL $1, BP		// n--
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Oct 19 23:33:27 UTC 2023
    - 4K bytes
    - Viewed (0)
  3. src/math/big/arith_arm.s

    	TEQ	R1, R4
    	BNE L4a
    	MOVW	R3, c+28(FP)
    	RET
    L4a:
    	MOVW.P	4(R2), R5
    	SUB.S	R3, R5
    	MOVW.P	R5, 4(R1)
    	B	E4
    L4:
    	MOVW.P	4(R2), R5
    	SBC.S	$0, R5
    	MOVW.P	R5, 4(R1)
    E4:
    	TEQ	R1, R4
    	BNE	L4
    
    	MOVW	$0, R0
    	MOVW.CC	$1, R0
    	MOVW	R0, c+28(FP)
    	RET
    
    
    // func shlVU(z, x []Word, s uint) (c Word)
    TEXT ·shlVU(SB),NOSPLIT,$0
    	MOVW	z_len+4(FP), R5
    	TEQ	$0, R5
    	BEQ	X7
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Oct 19 23:33:27 UTC 2023
    - 4K bytes
    - Viewed (0)
  4. src/math/big/arith_amd64.s

    L8:	MOVQ AX, DX		// w = w1
    	MOVQ -8(R8)(BX*8), AX	// w1 = x[i-1]
    	SHLQ CX, AX, DX		// w<<s | w1>>ŝ
    	MOVQ DX, (R10)(BX*8)	// z[i] = w<<s | w1>>ŝ
    	SUBQ $1, BX		// i--
    	JG L8			// i > 0
    
    	// i <= 0
    X8a:	SHLQ CX, AX		// w1<<s
    	MOVQ AX, (R10)		// z[0] = w1<<s
    	RET
    
    X8b:	MOVQ $0, c+56(FP)
    	RET
    
    
    // func shrVU(z, x []Word, s uint) (c Word)
    TEXT ·shrVU(SB),NOSPLIT,$0
    	MOVQ z_len+8(FP), R11
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Oct 19 23:33:27 UTC 2023
    - 9.1K bytes
    - Viewed (0)
  5. src/crypto/aes/asm_arm64.s

    		STPW.P	(R6, R7), 8(R10)
    		VMOV	R7, V2.S[0]
    		WORD	$0x4E030042 //TBL	V3.B16, [V2.B16], V2.B16
    		AESE	V0.B16, V2.B16
    		EORW	R13, R0
    		LSLW	$1, R13
    		SUBS	$1, R8
    		VMOV	V2.S[0], R9
    		EORW	R9, R0
    		EORW	R0, R1
    		EORW	R1, R2
    		EORW	R2, R3
    		VMOV	R3, V2.S[0]
    		WORD	$0x4E040042 //TBL	V3.B16, [V2.B16], V2.B16
    		AESE	V0.B16, V2.B16
    		VMOV	V2.S[0], R9
    		EORW	R9, R4
    		EORW	R4, R5
    		EORW	R5, R6
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Mar 04 17:29:44 UTC 2024
    - 6.9K bytes
    - Viewed (0)
  6. src/math/big/arith_arm64.s

    	MOVD	x+24(FP), R2
    	MOVD	s+48(FP), R3
    	ADD	R1<<3, R0	// R0 = &z[n]
    	ADD	R1<<3, R2	// R2 = &x[n]
    	CBZ	R1, len0
    	CBZ	R3, copy	// if the number of shift is 0, just copy x to z
    	MOVD	$64, R4
    	SUB	R3, R4
    	// handling the most significant element x[n-1]
    	MOVD.W	-8(R2), R6
    	LSR	R4, R6, R5	// return value
    	LSL	R3, R6, R8	// x[i] << s
    	SUB	$1, R1
    one:	TBZ	$0, R1, two
    	MOVD.W	-8(R2), R6
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Oct 19 23:33:27 UTC 2023
    - 11.8K bytes
    - Viewed (0)
  7. src/sync/atomic/race.s

    // license that can be found in the LICENSE file.
    
    //go:build race
    
    // This file is here only to allow external functions.
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Sat Nov 06 10:24:44 UTC 2021
    - 294 bytes
    - Viewed (0)
  8. src/crypto/sha1/sha1block_arm.s

    	ROUND2(Rd, Re, Ra, Rb, Rc)
    	ROUND2(Rc, Rd, Re, Ra, Rb)
    	ROUND2(Rb, Rc, Rd, Re, Ra)
    	SUB.S	$1, Rctr
    	BNE	loop2
    
    	MOVW	$0x8F1BBCDC, Rconst
    	MOVW	$4, Rctr
    loop3:	ROUND3(Ra, Rb, Rc, Rd, Re)
    	ROUND3(Re, Ra, Rb, Rc, Rd)
    	ROUND3(Rd, Re, Ra, Rb, Rc)
    	ROUND3(Rc, Rd, Re, Ra, Rb)
    	ROUND3(Rb, Rc, Rd, Re, Ra)
    	SUB.S	$1, Rctr
    	BNE	loop3
    
    	MOVW	$0xCA62C1D6, Rconst
    	MOVW	$4, Rctr
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Mar 04 17:29:44 UTC 2024
    - 5.6K bytes
    - Viewed (0)
  9. src/runtime/asan_amd64.s

    // license that can be found in the LICENSE file.
    
    //go:build asan
    
    #include "go_asm.h"
    #include "go_tls.h"
    #include "funcdata.h"
    #include "textflag.h"
    
    // This is like race_amd64.s, but for the asan calls.
    // See race_amd64.s for detailed comments.
    
    #ifdef GOOS_windows
    #define RARG0 CX
    #define RARG1 DX
    #define RARG2 R8
    #define RARG3 R9
    #else
    #define RARG0 DI
    #define RARG1 SI
    #define RARG2 DX
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed Nov 22 02:20:04 UTC 2023
    - 2.4K bytes
    - Viewed (0)
  10. src/runtime/vlop_386.s

    // Inferno's libkern/vlop-386.s
    // https://bitbucket.org/inferno-os/inferno-os/src/master/libkern/vlop-386.s
    //
    //         Copyright © 1994-1999 Lucent Technologies Inc. All rights reserved.
    //         Revisions Copyright © 2000-2007 Vita Nuova Holdings Limited (www.vitanuova.com).  All rights reserved.
    //         Portions Copyright 2009 The Go Authors. All rights reserved.
    //
    // Permission is hereby granted, free of charge, to any person obtaining a copy
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Jun 04 07:25:06 UTC 2020
    - 2K bytes
    - Viewed (0)
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