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doc/asm.html
what the toolchain actually generates for that operation might not be a move instruction at all, perhaps a clear or load. Or it might correspond exactly to the machine instruction with that name. In general, machine-specific operations tend to appear as themselves, while more general concepts like memory move and subroutine call and return are more abstract.
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src/cmd/asm/internal/asm/testdata/arm64.s
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src/cmd/asm/internal/asm/testdata/ppc64.s
// (Rx)(R0) is equivalent to (Rx+R0) // In case of base+displacement mode instructions if // the offset is 0, usage of (Rx) is equivalent to 0(Rx) TEXT asmtest(SB),DUPOK|NOSPLIT,$0 // move constants MOVD $1, R3 // 38600001 MOVD $-1, R4 // 3880ffff MOVD $65535, R5 // 6005ffff MOVD $65536, R6 // 3cc00001
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doc/go_mem.html
</p> <p> Not introducing data races also means not assuming that loops terminate. For example, a compiler must in general not move the accesses to <code>*p</code> or <code>*q</code> ahead of the loop in this program: </p> <pre> n := 0 for e := list; e != nil; e = e.next { n++ } i := *p *q = 1 </pre> <p>
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src/cmd/asm/internal/asm/testdata/riscv64.s
FDIVS F1, F0, F2 // 53011018 FMINS F1, F0, F2 // 53011028 FMAXS F1, F0, F2 // 53111028 FSQRTS F0, F1 // d3000058 // 11.7: Single-Precision Floating-Point Conversion and Move Instructions FCVTWS F0, X5 // d31200c0 FCVTWS.RNE F0, X5 // d30200c0 FCVTWS.RTZ F0, X5 // d31200c0 FCVTWS.RDN F0, X5 // d32200c0 FCVTWS.RUP F0, X5 // d33200c0 FCVTWS.RMM F0, X5 // d34200c0
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