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api/maven-api-core/src/main/java/org/apache/maven/api/services/Result.java
* * <p>Each result is linked to its originating {@link Request}, allowing for: * <ul> * <li>Traceability between requests and their outcomes</li> * <li>Access to the session context used during processing</li> * <li>Correlation of results with their initiating parameters</li> * </ul> *
Registered: Sun Sep 07 03:35:12 UTC 2025 - Last Modified: Wed Jan 29 08:17:07 UTC 2025 - 1.9K bytes - Viewed (0) -
android/guava-tests/test/com/google/common/util/concurrent/GeneratedMonitorTest.java
Registered: Fri Sep 05 12:43:10 UTC 2025 - Last Modified: Mon Aug 11 19:31:30 UTC 2025 - 27K bytes - Viewed (0) -
docs/distributed/README.md
## Get started If you're aware of stand-alone MinIO set up, the process remains largely the same. MinIO server automatically switches to stand-alone or distributed mode, depending on the command line parameters.
Registered: Sun Sep 07 19:28:11 UTC 2025 - Last Modified: Tue Aug 12 18:20:36 UTC 2025 - 8.9K bytes - Viewed (0) -
doc/go_mem.html
and not yet overwritten. These implementation constraints make Go more like Java or JavaScript, in that most races have a limited number of outcomes, and less like C and C++, where the meaning of any program with a race is entirely undefined, and the compiler may do anything at all. Go's approach aims to make errant programs more reliable and easier to debug,
Registered: Tue Sep 09 11:13:09 UTC 2025 - Last Modified: Tue Aug 05 15:41:37 UTC 2025 - 26.6K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/386.s
TEXT foo(SB), DUPOK|NOSPLIT, $0 // LTYPE1 nonrem { outcode(int($1), &$2); } SETCC AX SETCC foo+4(SB) // LTYPE2 rimnon { outcode(int($1), &$2); } DIVB AX DIVB foo+4(SB) PUSHL $foo+4(SB) POPL AX // LTYPE3 rimrem { outcode(int($1), &$2); } SUBB $1, AX SUBB $1, foo+4(SB) SUBB BX, AX SUBB BX, foo+4(SB) // LTYPE4 remrim { outcode(int($1), &$2); } CMPB AX, $1 CMPB foo+4(SB), $4
Registered: Tue Sep 09 11:13:09 UTC 2025 - Last Modified: Tue Apr 09 18:57:21 UTC 2019 - 2K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/amd64.s
// LTYPEI spec7 { outcode($1, &$2); } IMULB DX IMULW DX, BX IMULL R11, R12 IMULQ foo+4(SB), R11 // LTYPEXC spec8 { outcode($1, &$2); } CMPPD X1, X2, 4 CMPPD foo+4(SB), X2, 4 // LTYPEX spec9 { outcode($1, &$2); } PINSRW $4, AX, X2 PINSRW $4, foo+4(SB), X2 // LTYPERT spec10 { outcode($1, &$2); } JCS 2(PC) RETFL $4 // Was bug: LOOP is a branch instruction. JCS 2(PC) loop:
Registered: Tue Sep 09 11:13:09 UTC 2025 - Last Modified: Tue Apr 09 18:57:21 UTC 2019 - 3.3K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/mips64.s
// LMOVH rreg ',' rreg // { // outcode(int($1), &$2, 0, &$4); // } MOVH R16, R27 // 0010dc00001bdc03 MOVHU R1, R3 // 3023ffff // LMOVB rreg ',' rreg // { // outcode(int($1), &$2, 0, &$4); // } MOVB R8, R9 // 00084e0000094e03 MOVBU R12, R17 // 319100ff // LMOVV addr ',' rreg // { // outcode(int($1), &$2, 0, &$4); // } MOVV foo<>+3(SB), R2
Registered: Tue Sep 09 11:13:09 UTC 2025 - Last Modified: Tue Aug 08 12:17:12 UTC 2023 - 12.4K bytes - Viewed (0) -
docs/metrics/prometheus/list.md
| `minio_node_ilm_action_count_delete_version_action` | Total action outcome of lifecycle checks since server start for deleting a version |
Registered: Sun Sep 07 19:28:11 UTC 2025 - Last Modified: Tue Aug 12 18:20:36 UTC 2025 - 43.4K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/mips.s
// // LMOVW fpscr ',' freg // { // outcode(int($1), &$2, 0, &$4); // } MOVW FCR0, R1 // LMOVW freg ',' fpscr // { // outcode(int($1), &$2, 0, &$4); // } MOVW R1, FCR0 // LMOVW rreg ',' mreg // { // outcode(int($1), &$2, 0, &$4); // } MOVW R1, M1 MOVW R1, M1 // LMOVW mreg ',' rreg // { // outcode(int($1), &$2, 0, &$4); // } MOVW M1, R1
Registered: Tue Sep 09 11:13:09 UTC 2025 - Last Modified: Tue Aug 08 12:17:12 UTC 2023 - 6.7K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/arm.s
// { // outcode($1, $2, &$3, 0, &$5); // } ADD $1, R2 ADD R1<<R2, R3 ADD R1>>R2, R3 ADD R1@>R2, R3 ADD R1->R2, R3 ADD R1, R2 // // MVN // // LTYPE2 cond imsr ',' reg // { // outcode($1, $2, &$3, 0, &$5); // } CLZ R1, R2 // // MOVW // // LTYPE3 cond gen ',' gen // { // outcode($1, $2, &$3, 0, &$5); // } MOVW.S R1, R2 MOVW $1, R2 MOVW.S R1<<R2, R3 //
Registered: Tue Sep 09 11:13:09 UTC 2025 - Last Modified: Fri Dec 15 20:51:01 UTC 2023 - 69K bytes - Viewed (0)