VADDPD 8128(DX), Z28, Z29       // 62619d40586a7f
	VADDPD 8128(DX)(AX*2), Z0, Z29  // 6261fd48586c427f
	VADDPD 8128(DX)(AX*2), Z29, Z1  // 62f19540584c427f
	// EVEX: compressed displacement that does not fit into 8bits.
	VADDPD 2048(DX), X29, X0        // 62f19500588200080000
	VADDPD 2048(DX), X1, X29        // 6261f50858aa00080000
	VADDPD 2048(DX), X29, X28       // 6261950058a200080000

	// TODO: These are preprocessed by the assembler into MOVD $const>>shift, R5; SLD $shift, R5.
	//       This only captures the MOVD. Should the SLD be appended to the encoding by the test?
	// Hex constant 0x20004000000
	MOVD $2199090364416, R5         // 60058001
	// Hex constant 0xFFFFFE0004000000
	MOVD $-2198956146688, R5        // 38a08001
	// TODO: On GOPPC64={power8,power9}, this is preprocessed into MOVD $-1, R5; RLDC R5, $33, $63, R5.

	VREV32	V5.B16, V5.B16                  // a508206e
	VREV64	V2.S2, V3.S2                    // 4308a00e
	VREV64	V2.S4, V3.S4                    // 4308a04e

// logical ops
//
// make sure constants get encoded into an instruction when it could
	AND	R1@>33, R2
	AND	$(1<<63), R1                        // AND	$-9223372036854775808, R1       // 21004192
	AND	$(1<<63-1), R1                      // AND	$9223372036854775807, R1        // 21f84092