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  1. src/cmd/asm/internal/asm/testdata/mips64.s

    	VMOVD	W2, (R3)       // 780018a7
    	VMOVD	W19, 128(R23)  // 7810bce7
    	VMOVD	W0, -256(R31)  // 7be0f827
    	RET
    
    // END
    //
    //	LEND	comma // asm doesn't support the trailing comma.
    //	{
    //		outcode(int($1), &nullgen, 0, &nullgen);
    //	}
    Others
    - Registered: Tue Apr 30 11:13:12 GMT 2024
    - Last Modified: Tue Aug 08 12:17:12 GMT 2023
    - 12.4K bytes
    - Viewed (0)
  2. src/cmd/asm/internal/asm/testdata/armv6.s

    	MOVWD	R6, F8                                    // 106b0feecf8bb8ee
    	MOVWD.U	F6, F8                                    // 468bb8ee
    	MOVWD.U	R6, F8                                    // 106b0fee4f8bb8ee
    
    Others
    - Registered: Tue Apr 30 11:13:12 GMT 2024
    - Last Modified: Thu Dec 21 16:30:51 GMT 2017
    - 4.6K bytes
    - Viewed (0)
  3. src/cmd/asm/internal/asm/testdata/amd64enc_extra.s

    	TPAUSE BX // 660faef3
    	UMONITOR BX // f30faef3
    	UMWAIT BX // f20faef3
    
    	RDPID DX                                // f30fc7fa
    	RDPID R11                               // f3410fc7fb
    
    	// End of tests.
    Others
    - Registered: Tue Apr 30 11:13:12 GMT 2024
    - Last Modified: Tue Apr 11 18:32:50 GMT 2023
    - 57.6K bytes
    - Viewed (0)
  4. src/cmd/asm/internal/asm/testdata/386enc.s

    	MOVL DR6, DX // 0f21f2
    	MOVL DR7, SI // 0f21fe
    	// Test other movtab entries.
    	PUSHL SS // 16
    	PUSHL FS // 0fa0
    	POPL FS  // 0fa1
    	POPL SS  // 17
    
    	RDPID AX                                // f30fc7f8
    
    	// End of tests.
    Others
    - Registered: Tue Apr 30 11:13:12 GMT 2024
    - Last Modified: Tue Apr 11 18:32:50 GMT 2023
    - 1.2K bytes
    - Viewed (0)
  5. src/cmd/asm/internal/asm/testdata/arm.s

    	MOVHU	R5@>24, R1                                        // 751cffe6
    
    	RET	foo(SB)
    
    //
    // END
    //
    //	LTYPEE
    //	{
    //		outcode($1, Always, &nullgen, 0, &nullgen);
    //	}
    Others
    - Registered: Tue Apr 30 11:13:12 GMT 2024
    - Last Modified: Fri Dec 15 20:51:01 GMT 2023
    - 69K bytes
    - Viewed (0)
  6. src/cmd/asm/internal/asm/testdata/mips.s

    	SEH	R1, R2 // 7c011620
    
    	// to (Hi, Lo)
    	MADD	R2, R1 // 70220000
    	MSUB	R2, R1 // 70220004
    	MUL	R2, R1 // 00220018
    
    	// END
    	//
    	//	LEND	comma // asm doesn't support the trailing comma.
    	//	{
    	//		outcode(int($1), &nullgen, 0, &nullgen);
    	//	}
    Others
    - Registered: Tue Apr 30 11:13:12 GMT 2024
    - Last Modified: Tue Aug 08 12:17:12 GMT 2023
    - 6.7K bytes
    - Viewed (0)
  7. src/cmd/asm/internal/asm/testdata/arm64.s

    	DC	CIGVAC, R24                        // 787e0bd5
    	DC	CIGDVAC, R25                       // b97e0bd5
    	DC	CVAP, R26                          // 3a7c0bd5
    	DC	CVADP, R27                         // 3b7d0bd5
    Others
    - Registered: Tue Apr 30 11:13:12 GMT 2024
    - Last Modified: Fri Dec 08 03:28:17 GMT 2023
    - 94.9K bytes
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  8. src/cmd/asm/internal/asm/testdata/armerror.s

    	STREXD	R0, (R2), R2       // ERROR "cannot use same register as both source and destination"
    	STREXD	R1, (R4), R7       // ERROR "must be even"
    
    Others
    - Registered: Tue Apr 30 11:13:12 GMT 2024
    - Last Modified: Fri Nov 03 14:06:21 GMT 2017
    - 14.4K bytes
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