from tensorflow.python.framework import test_util
from tensorflow.python.platform import test


class OpsDefsTest(test.TestCase):
  """Test utils."""

  def _assertOpAndComposite(self, vars_, compute_op, compute_composite, kwargs,
                            op_kwargs=None):
    if op_kwargs is None:
      op_kwargs = kwargs
    if test_util.IsMklEnabled():
      self.skipTest("Not compatible with oneDNN custom ops.")

  func.return %arg0, %arg1 : tensor<?x?xi32>, tensor<?x?xi32>
}

// Batch function in batch_1 uses the same shared_name as the one in batch_0,
// so compute_1 is deduped, and compute_0 will be used here.
// CHECK-LABEL: func private @batch_1
// CHECK: f = @compute_0
// CHECK-NOT: f = @compute_1
func.func private @batch_1(%arg0: tensor<?x?xi32>) -> tensor<*xi32> {

  func.return %0#0 : tensor<*xi32>
}

// compute_3 has different argument types from compute_1, thus error is reported.

  }

  auto compile_op = builder->create<TF::_TPUCompileMlirOp>(
      cluster_func.getLoc(),
      /*compilation_status=*/compilation_status_type, /*program=*/
      llvm::SmallVector<Type, 8>(num_cores_per_replica, program_type),
      compile_op_operands, txt_module, txt_metadata);

  return tensorflow::WrapOpInLaunch(builder, compile_op.getLoc(), compile_op,

  Operation* tpu_compile_successor = nullptr;
  func_op->walk([&](TF::_TPUCompileMlirOp compile_op) {
    if (compile_op->getParentOp() == nullptr ||
        !isa<tf_device::LaunchOp>(compile_op->getParentOp()))
      return WalkResult::advance();
    Operation* compile_launch_op = compile_op->getParentOp();

    if (compile_launch_op->getBlock() == preprocess_or_launch->getBlock() &&

# See https://developer.nvidia.com/cuda-gpus#compute
# `compute_XY` enables PTX embedding in addition to SASS. PTX
# is forward compatible beyond the current compute capability major
# release while SASS is only forward compatible inside the current
# major release. Example: sm_80 kernels can run on sm_89 GPUs but
# not on sm_90 GPUs. compute_80 kernels though can also run on sm_90 GPUs.

  TF_SavedModel* saved_model =
      TF_LoadSavedModel(model_dir.c_str(), ctx, status);

  EXPECT_EQ(TF_GetCode(status), TF_OK) << TF_Message(status);
  TF_ConcreteFunction* compute_fn =
      TF_GetSavedModelConcreteFunction(saved_model, "compute", status);
  EXPECT_EQ(TF_GetCode(status), TF_OK) << TF_Message(status);

  std::vector<TFE_TensorHandle*> compute_fn_inputs;

		o1 &^= 0x3ffff
		o2 &^= 0x0ffff
		o1 |= computePrefix34HI(t)
		o2 |= computeLO(int32(t))
	case objabi.R_ADDRPOWER_D34:
		o1 &^= 0x3ffff
		o2 &^= 0x0ffff
		o1 |= computePrefix34HI(t)
		o2 |= computeLO(int32(t))
	case objabi.R_ADDRPOWER:
		o1 &^= 0xffff
		o2 &^= 0xffff
		o1 |= computeHA(int32(t))
		o2 |= computeLO(int32(t))
	case objabi.R_ADDRPOWER_DS:
		o1 &^= 0xffff
		o2 &^= 0xfffc

    TF::TPUCompilationResultOp compile_op = nullptr;
    for (auto op : func.getRegion().getOps<TF::TPUCompilationResultOp>()) {
      if (compile_op == nullptr) {
        compile_op = op;
      } else {
        ops_to_erase.insert(op);
      }
    }
    // If there's no outside compilation, we can exit early because this isn't
    // a TPU function.
    if (compile_op == nullptr) {

        'you want to build with.\nYou can find the compute capability of your '
        'device at: https://developer.nvidia.com/cuda-gpus. Each capability '
        'can be specified as "x.y" or "compute_xy" to include both virtual and'
        ' binary GPU code, or as "sm_xy" to only include the binary '
        'code.\nPlease note that each additional compute capability '