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Results 1 - 6 of 6 for bitwise_and (0.21 sec)

  1. tensorflow/compiler/mlir/tf2xla/tests/legalize-tf-binary-elementwise.mlir

      %0 = "tf.BitwiseXor"(%arg0, %arg1) : (tensor<4xui32>, tensor<4xui32>) -> tensor<4xui32>
      func.return %0: tensor<4xui32>
    }
    
    // CHECK-LABEL: func @bitwise_and
    func.func @bitwise_and(%arg0: tensor<4xi32>, %arg1: tensor<4xi32>) -> tensor<4xi32> {
      // CHECK-NEXT: mhlo.and
      %0 = "tf.BitwiseAnd"(%arg0, %arg1) : (tensor<4xi32>, tensor<4xi32>) -> tensor<4xi32>
      func.return %0: tensor<4xi32>
    }
    
    // CHECK-LABEL: func @bitwise_and_unsigned
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Sat Apr 06 15:32:52 UTC 2024
    - 18.4K bytes
    - Viewed (0)
  2. tensorflow/compiler/mlir/quantization/tensorflow/utils/tf_to_xla_attribute_utils.cc

    //
    // if value.shape[1] % 2:
    //   value = pad(value, [0, 1, 0, 0])
    //
    // slice_shape = value.shape
    // slice_shape[1] /= 2
    //
    // packed_low = slice(value, [0, 0, 0, 0], slice_shape)
    // packed_low = bitwise_and(packed_low, 0x0F)
    //
    // packed_high = slice(value, [0, value.shape[1] / 2, 0, 0], slice_shape)
    // packed_high = left_shift(packed_high, 4)
    //
    // packed_value = bitwise_or(packed_low, packed_high)
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Fri May 17 17:58:54 UTC 2024
    - 13.3K bytes
    - Viewed (0)
  3. tensorflow/compiler/mlir/lite/stablehlo/tests/legalize_hlo.mlir

      %1 = mhlo.xor %0, %arg1 : tensor<1x4xi8>
      func.return %1 : tensor<1x4xi8>
    }
    
    // CHECK-LABEL:   func @bitwise_and(
    // CHECK-SAME:                      %[[VAL_0:.*]]: tensor<4xi32>,
    // CHECK-SAME:                      %[[VAL_1:.*]]: tensor<4xi32>) -> tensor<4xi32> {
    // CHECK:           %[[VAL_2:.*]] = "tf.BitwiseAnd"(%[[VAL_0]], %[[VAL_1]]) : (tensor<4xi32>, tensor<4xi32>) -> tensor<4xi32>
    // CHECK:           return %[[VAL_2]] : tensor<4xi32>
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Wed May 29 07:26:59 UTC 2024
    - 340.2K bytes
    - Viewed (0)
  4. tensorflow/compiler/mlir/tensorflow/ir/tf_generated_ops.td

    for dtype in dtype_list:
      lhs = tf.constant([0, 5, 3, 14], dtype=dtype)
      rhs = tf.constant([5, 0, 7, 11], dtype=dtype)
      exp = tf.constant([0, 0, 3, 10], dtype=tf.float32)
    
      res = bitwise_ops.bitwise_and(lhs, rhs)
      tf.assert_equal(tf.cast(res, tf.float32), exp) # TRUE
    ```
      }];
    
      let arguments = (ins
        TF_IntTensor:$x,
        TF_IntTensor:$y
      );
    
      let results = (outs
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Tue Jun 11 23:24:08 UTC 2024
    - 793K bytes
    - Viewed (0)
  5. RELEASE.md

    *   Register devices under their legacy names in device_mgr to ease the
        transition to clusterspec-propagated configurations.
    *   VectorExponential added to distributions.
    *   Add a bitwise module with bitwise_and, bitwise_or, bitwise_xor, and invert
        functions.
    *   Add fixed-grid ODE integration routines.
    *   Allow passing bounds to ScipyOptimizerInterface.
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Tue Jun 11 23:24:08 UTC 2024
    - 730.3K bytes
    - Viewed (0)
  6. tensorflow/compiler/jit/mark_for_compilation_pass.cc

                // Binary
                "Add", "AddV2", "Sub", "Mul", "Div", "Atan2", "Complex", "DivNoNan",
                "MulNoNan", "FloorDiv", "Xlogy", "Xlog1py", "Xdivy", "FloorMod",
                "BitwiseAnd", "BitwiseOr", "BitwiseXor", "LeftShift", "RightShift",
                "LogicalAnd", "LogicalOr", "Mod", "Maximum", "Minimum", "RealDiv",
                "ReciprocalGrad", "RsqrtGrad", "SqrtGrad", "TruncateDiv",
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Wed Feb 21 12:19:41 UTC 2024
    - 85.3K bytes
    - Viewed (0)
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