VMOVDQA BB0, state1StoreAVX2
	VMOVDQA CC0, state2StoreAVX2
	VMOVDQA DD0, ctr3StoreAVX2
	MOVQ    $10, itr2

openAVX2PreparePolyKey:
	chachaQR_AVX2(AA0, BB0, CC0, DD0, TT0)
	VPALIGNR $4, BB0, BB0, BB0; VPALIGNR $8, CC0, CC0, CC0; VPALIGNR $12, DD0, DD0, DD0
	chachaQR_AVX2(AA0, BB0, CC0, DD0, TT0)
	VPALIGNR $12, BB0, BB0, BB0; VPALIGNR $8, CC0, CC0, CC0; VPALIGNR $4, DD0, DD0, DD0

//   unused result of the while loop

// CHECK-LABEL: remove_first_result
// CHECK:       tf.WhileRegion
// CHECK-SAME:    (%[[ARG:[a-zA-Z0-9_]+]])
// CHECK:       ^bb0
// CHECK:         (%[[CARG:[a-zA-Z0-9_]+]]: tensor<*xf32>)
// CHECK:       tf.OpA
// CHECK:       ^bb0
// CHECK:         (%[[BARG:[a-zA-Z0-9_]+]]: tensor<*xf32>)
// CHECK-NOT:   tf.OpB
// CHECK:       tf.OpC
// CHECK-SAME:    %[[BARG]]

// CHECK:       [[RES_1:%.*]] = "tf.Add"([[CST_1]], [[CST_0]])
// CHECK:       [[RES_2:%.*]] = "tf.Mul"([[RES_1]], [[CST_1]])
// CHECK:       tf.WhileRegion
// CHECK:       ^bb0
// CHECK:       tf.OpA
// CHECK:       ^bb0([[ARG_2:%[a-zA-Z0-9_]+]]
// CHECK-SAME:  [[ARG_3:%[a-zA-Z0-9_]+]]: tensor<i32>)
// CHECK-NEXT:  [[RES_3:%.*]] = "tf.AddV2"([[ARG_2]], [[RES_1]])
// CHECK-NEXT:  [[RES_4:%.*]] = "tf.Div"([[ARG_3]], [[RES_2]])

// CHECK-NEXT: return

// CHECK-LABEL: @tfl_if_gets_control_node
func.func @tfl_if_gets_control_node(%arg0: tensor<1xi1>)->() {
  "tfl.if"(%arg0) (
  {
    // then
    ^bb0:
     "tfl.yield"() : () -> ()
  },
  {
    // else
   ^bb0:
    "tfl.yield"() : () -> ()
  }) : (tensor<1xi1>) -> ()
  func.return
}
// CHECK-NEXT: %[[CONTROL:.*]] = tfl.control_node controls "tfl.if"
// CHECK-NEXT: "tfl.yield"() : () -> ()

}

// CHECK: tfl.while
// CHECK: ^bb0([[ARGS:.*]]):
// CHECK:   call @while_cond_10_frozen0
// CHECK:   yield
// CHECK: ^bb0([[ARGS]]):
// CHECK:   call @while_body
// CHECK:   yield
// CHECK: while_body
// CHECK: while_cond

// INLINE: tfl.while
// INLINE: ^bb0([[ARGS:.*]]):
// INLINE:   tf.Less
// INLINE:   yield
// INLINE: ^bb0([[ARGS]]):
// INLINE:   %cst_2 = arith.constant

  ^bb0(%arg4: tensor<4xf32>):
    %1 = func.call @init(%arg4) : (tensor<4xf32>) -> tensor<7xf32>
    "tf.Yield"(%1) : (tensor<7xf32>) -> ()
  }, {
  ^bb0(%arg4: tensor<7xf32>, %arg5: tensor<3xf32>):
    %1 = func.call @next(%arg4, %arg5) : (tensor<7xf32>, tensor<3xf32>) -> tensor<6xf32>
    "tf.Yield"(%1) : (tensor<6xf32>) -> ()
  }, {
  ^bb0(%arg4: tensor<6xf32>, %arg5: tensor<2xf32>):

  "func.func"() ({
  ^bb0(%arg0: tensor<i32>):
    "func.return"(%arg0) : (tensor<i32>) -> ()
  }) {sym_name = "main_while_body_4225150", sym_visibility = "private", tf._input_shapes = [#tf_type.shape<>], tf.signature.is_stateful, function_type = (tensor<i32>) -> (tensor<i32>)} : () -> ()
  "func.func"() ({
  ^bb0(%arg0: tensor<i32>):

// Check to see if nested regions in while loops are preserved
// CHECK:     %{{.*}}:2 = "tfl.while"(%{{.*}}, %{{.*}}) ({
// CHECK:     ^bb0(%{{.*}}: tensor<*xi32>, %{{.*}}: tensor<*xf32>):
// CHECK:       "tfl.yield"(%{{.*}}) : (tensor<i1>) -> ()
// CHECK:     },  {
// CHECK:     ^bb0(%{{.*}}: tensor<*xi32>, %{{.*}}: tensor<*xf32>):
// CHECK:       "tfl.yield"(%{{.*}}, %{{.*}}) : (tensor<*xi32>, tensor<*xf32>) -> ()

  %0:2 = "tf.WhileRegion"(%arg0, %arg1) (
    // cond
    {
    ^bb0(%condArg0: tensor<*xi32>, %condArg1: tensor<*xf32>):
      %0 = "arith.constant" () {value = dense<0> : tensor<i32>} : () -> tensor<i32> loc("Const")
      %1 = "tf.NotEqual"(%condArg0, %0) : (tensor<*xi32>, tensor<i32>) -> tensor<i1>
      "tf.Yield"(%1) : (tensor<i1>) -> ()
    },
    // body
    {
    ^bb0(%bodyArg0: tensor<*xi32>, %bodyArg1: tensor<*xf32>):

// CHECK-DAG:       ^bb0(%[[A2_COND:.*]]: tensor<i32>):
// CHECK-DAG:         %[[CST_3:.*]] = arith.constant dense<3> : tensor<i32>
// CHECK-DAG:         %[[VAL_1:.*]] = tfl.less(%[[A2_COND]], %[[CST_3]]) : (tensor<i32>, tensor<i32>) -> tensor<i1>
// CHECK-DAG:         "tfl.yield"(%[[VAL_1]]) : (tensor<i1>) -> ()
// CHECK-DAG:       },  {
// CHECK-DAG:       ^bb0(%[[A2_BODY:.*]]: tensor<i32>):