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Results 1 - 10 of 569 for TypeId (0.12 sec)
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tensorflow/compiler/mlir/tf2xla/transforms/legalization_op_config.cc
TypeID::get<TF::CosOp>(), TypeID::get<TF::TanOp>(), TypeID::get<TF::DiagPartOp>(), TypeID::get<TF::EinsumOp>(), TypeID::get<TF::ExpOp>(), TypeID::get<TF::Expm1Op>(), TypeID::get<TF::FakeQuantWithMinMaxArgsOp>(), TypeID::get<TF::FloorOp>(), TypeID::get<TF::IFFTOp>(), TypeID::get<TF::ImagOp>(), TypeID::get<TF::IsFiniteOp>(), TypeID::get<TF::IsInfOp>(),
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Wed Apr 24 04:08:35 UTC 2024 - 21.7K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/transforms/tpu_validate_inputs.cc
static auto* ops = [] { llvm::SmallDenseSet<mlir::TypeID, 32>* ops_set = new llvm::SmallDenseSet<mlir::TypeID, 32>{ TypeID::get<mlir::ModuleOp>(), TypeID::get<mlir::tf_executor::GraphOp>(), TypeID::get<mlir::func::ReturnOp>(), TypeID::get<mlir::func::FuncOp>(), TypeID::get<mlir::tf_executor::YieldOp>(), TypeID::get<mlir::tf_executor::IslandOp>(),
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Tue May 07 06:51:01 UTC 2024 - 21.5K bytes - Viewed (0) -
tensorflow/compiler/mlir/tf2xla/transforms/legalization_op_config.h
bool IsDynamicPadderOp(const TypeID& type_id); // Returns True if this op has a Tf2XLA fallback. Currently, this is not the // inverse of the !IsOpLegalizedWithMlir, but it should be. bool HasTf2XlaFallback(const TypeID& type_id); // Whether this type is allowed to have a TF2XLA fallback. bool IsOpAllowedTf2xlaFallback(const TypeID& type_id); // Whether this type is Preferred to use a TF2XLA fallback kernel when using
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Mon Feb 26 20:53:25 UTC 2024 - 2K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/experimental/tac/hardwares/target_hardware.cc
std::string description; mlir::TypeID type_id; std::unique_ptr<TargetHardware> target_hardware; std::function<std::unique_ptr<TargetHardware>()> target_hardware_factory; }; struct RegisteredTargetHardwareOps { explicit RegisteredTargetHardwareOps(mlir::TypeID hardware_type) : hardware_typeid(hardware_type) {} // Key is the Operation TypeID llvm::DenseMap<mlir::TypeID, std::unique_ptr<TargetHardwareOperation>>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Tue May 09 21:39:59 UTC 2023 - 9.9K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/experimental/tac/hardwares/target_hardware.h
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Tue May 09 21:39:59 UTC 2023 - 7.3K bytes - Viewed (0) -
src/encoding/gob/debug.go
} // int returns the signed int at the input point, as an int (not int64). func (deb *debugger) int() int { return int(deb.int64()) } // typeId returns the type id at the input point. func (deb *debugger) typeId() typeId { return typeId(deb.int64()) } // string returns the string at the input point. func (deb *debugger) string() string { x := int(deb.uint64()) b := make([]byte, x)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Jan 20 09:34:41 UTC 2023 - 18.3K bytes - Viewed (0) -
tensorflow/compiler/mlir/tf2xla/transforms/legalization_op_config_test.cc
EXPECT_TRUE(IsTypeLegalizedWithMlir(TypeID::get<TF::ModOp>())); EXPECT_FALSE(HasTf2XlaFallback(TypeID::get<TF::ModOp>())); EXPECT_FALSE(IsOpAllowedTf2xlaFallback(TypeID::get<TF::ModOp>())); EXPECT_FALSE(IsOpAllowedTf2xlaPreferred(TypeID::get<TF::ModOp>())); } TEST_F(LegalizationOpConfigTest, ExpectsTrueForTF2XLATypeID) { EXPECT_TRUE(HasTf2XlaFallback(TypeID::get<TF::AllOp>()));
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu May 30 03:31:01 UTC 2024 - 8.4K bytes - Viewed (0) -
src/encoding/gob/type.go
} return ut } // A typeId represents a gob Type as an integer that can be passed on the wire. // Internally, typeIds are used as keys to a map to recover the underlying type info. type typeId int32 var typeLock sync.Mutex // set while building a type const firstUserId = 64 // lowest id number granted to user type gobType interface { id() typeId setId(id typeId) name() string
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 16 02:00:26 UTC 2024 - 27.2K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/ir/tpu_embedding_ops_registry.h
template <typename OpType> void Add() { ops_type_ids_.insert(TypeID::get<OpType>()); } // Returns the type id of the ops in the TPUEmbeddingOpRegistry. const llvm::SmallDenseSet<mlir::TypeID>& GetOpsTypeIds(); // Returns the global registry. static TPUEmbeddingOpsRegistry& Global(); private: llvm::SmallDenseSet<mlir::TypeID> ops_type_ids_{}; }; } // namespace TF } // namespace mlir
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Wed Dec 14 05:42:28 UTC 2022 - 2K bytes - Viewed (0) -
src/encoding/gob/decoder.go
} dec.r = r dec.wireType = make(map[typeId]*wireType) dec.decoderCache = make(map[reflect.Type]map[typeId]**decEngine) dec.ignorerCache = make(map[typeId]**decEngine) dec.countBuf = make([]byte, 9) // counts may be uint64s (unlikely!), require 9 bytes return dec } // recvType loads the definition of a type. func (dec *Decoder) recvType(id typeId) { // Have we already seen this type? That's an error
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Sep 08 19:04:28 UTC 2023 - 7.2K bytes - Viewed (0)