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Results 1 - 6 of 6 for SETCS (0.5 sec)

  1. test/codegen/memops.go

    	d *= b[i+3]
    	// amd64: `DIVSS\t16\([A-Z]+[0-9]*\)\([A-Z]+[0-9]*\*4\), X[0-9]+`
    	d /= b[i+4]
    	return c, d
    }
    
    func storeTest(a []bool, v int, i int) {
    	// amd64: `BTL\t\$0,`,`SETCS\t4\([A-Z]+[0-9]*\)`
    	a[4] = v&1 != 0
    	// amd64: `BTL\t\$1,`,`SETCS\t3\([A-Z]+[0-9]*\)\([A-Z]+[0-9]*\*1\)`
    	a[3+i] = v&2 != 0
    }
    
    func bitOps(p *[12]uint64) {
    	// amd64: `ORQ\t\$8, \(AX\)`
    	p[0] |= 8
    	// amd64: `ORQ\t\$1073741824, 8\(AX\)`
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Aug 04 16:40:24 UTC 2023
    - 12.5K bytes
    - Viewed (0)
  2. src/cmd/internal/obj/x86/anames.go

    	"SALQ",
    	"SALW",
    	"SARB",
    	"SARL",
    	"SARQ",
    	"SARW",
    	"SARXL",
    	"SARXQ",
    	"SBBB",
    	"SBBL",
    	"SBBQ",
    	"SBBW",
    	"SCASB",
    	"SCASL",
    	"SCASQ",
    	"SCASW",
    	"SETCC",
    	"SETCS",
    	"SETEQ",
    	"SETGE",
    	"SETGT",
    	"SETHI",
    	"SETLE",
    	"SETLS",
    	"SETLT",
    	"SETMI",
    	"SETNE",
    	"SETOC",
    	"SETOS",
    	"SETPC",
    	"SETPL",
    	"SETPS",
    	"SFENCE",
    	"SGDT",
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Apr 11 18:32:50 UTC 2023
    - 19.1K bytes
    - Viewed (0)
  3. src/cmd/compile/internal/ssa/_gen/AMD64Ops.go

    		{name: "SETGE", argLength: 1, reg: readflags, asm: "SETGE"}, // extract signed >= condition from arg0
    		{name: "SETB", argLength: 1, reg: readflags, asm: "SETCS"},  // extract unsigned < condition from arg0
    		{name: "SETBE", argLength: 1, reg: readflags, asm: "SETLS"}, // extract unsigned <= condition from arg0
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Aug 04 16:40:24 UTC 2023
    - 98K bytes
    - Viewed (1)
  4. src/cmd/compile/internal/ssa/_gen/386Ops.go

    		{name: "SETGE", argLength: 1, reg: readflags, asm: "SETGE"}, // extract signed >= condition from arg0
    		{name: "SETB", argLength: 1, reg: readflags, asm: "SETCS"},  // extract unsigned < condition from arg0
    		{name: "SETBE", argLength: 1, reg: readflags, asm: "SETLS"}, // extract unsigned <= condition from arg0
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Mar 14 08:10:32 UTC 2023
    - 45.1K bytes
    - Viewed (0)
  5. src/cmd/asm/internal/asm/testdata/amd64enc.s

    	SETCC DL                                // 0f93c2
    	SETCC R11                               // 410f93c3
    	SETCS (BX)                              // 0f9203
    	SETCS (R11)                             // 410f9203
    	SETCS DL                                // 0f92c2
    	SETCS R11                               // 410f92c3
    	SETLS (BX)                              // 0f9603
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Oct 08 21:38:44 UTC 2021
    - 581.9K bytes
    - Viewed (0)
  6. src/cmd/compile/internal/ssa/_gen/AMD64.rules

    // Note that BTx instructions use the carry bit, so we need to convert tests for zero flag
    // into tests for carry flags.
    // ULT and SETB check the carry flag; they are identical to CS and SETCS. Same, mutatis
    // mutandis, for UGE and SETAE, and CC and SETCC.
    ((NE|EQ) (TESTL (SHLL (MOVLconst [1]) x) y)) => ((ULT|UGE) (BTL x y))
    ((NE|EQ) (TESTQ (SHLQ (MOVQconst [1]) x) y)) => ((ULT|UGE) (BTQ x y))
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Mar 12 19:38:41 UTC 2024
    - 93.9K bytes
    - Viewed (0)
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