"AMOMAXD",
	"AMOMAXUD",
	"AMOMIND",
	"AMOMINUD",
	"AMOSWAPW",
	"AMOADDW",
	"AMOANDW",
	"AMOORW",
	"AMOXORW",
	"AMOMAXW",
	"AMOMAXUW",
	"AMOMINW",
	"AMOMINUW",
	"RDCYCLE",
	"RDCYCLEH",
	"RDTIME",
	"RDTIMEH",
	"RDINSTRET",
	"RDINSTRETH",
	"FRCSR",
	"FSCSR",
	"FRRM",
	"FSRM",
	"FRFLAGS",
	"FSFLAGS",
	"FSRMI",
	"FSFLAGSI",
	"FLW",
	"FSW",
	"FADDS",
	"FSUBS",

	MOVW	A1, ret+16(FP)
	MOVW	A0, errno+20(FP)
	RET
noerr:
	MOVW	A0, ret+16(FP)
	MOVW	ZERO, errno+20(FP)
	RET

// func getCntxct() uint32
TEXT runtime·getCntxct(SB),NOSPLIT|NOFRAME,$0
	RDTIME	A0
	MOVW	A0, ret+0(FP)
	RET

// func issetugid() int32
TEXT runtime·issetugid(SB),NOSPLIT|NOFRAME,$0
	MOV $SYS_issetugid, T0
	ECALL
	MOVW	A0, ret+0(FP)

TEXT setg_gcc<>(SB),NOSPLIT,$0-0
	MOV	A0, g
	CALL	runtime·save_g(SB)
	RET

// func cputicks() int64
TEXT runtime·cputicks(SB),NOSPLIT,$0-8
	// RDTIME to emulate cpu ticks
	// RDCYCLE reads counter that is per HART(core) based
	// according to the riscv manual, see issue 46737
	RDTIME	A0
	MOV	A0, ret+0(FP)
	RET

// systemstack_switch is a dummy routine that systemstack leaves at the bottom

	AMOMIND		X5, (X6), X7			// af335386
	AMOMINUW	X5, (X6), X7			// af2353c6
	AMOMINUD	X5, (X6), X7			// af3353c6

	// 10.1: Base Counters and Timers
	RDCYCLE		X5				// f32200c0
	RDTIME		X5				// f32210c0
	RDINSTRET	X5				// f32220c0

	// 11.5: Single-Precision Load and Store Instructions
	FLW	(X5), F0				// 07a00200
	FLW	4(X5), F0				// 07a04200
	FSW	F0, (X5)				// 27a00200

			if arch.IsLoong64CMP(op) {
				prog.From = a[0]
				prog.Reg = p.getRegister(prog, op, &a[1])
				break
			}

			if arch.IsLoong64RDTIME(op) {
				// The Loong64 RDTIME family of instructions is a bit special,
				// in that both its register operands are outputs
				prog.To = a[0]
				if a[1].Type != obj.TYPE_REG {