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Results 1 - 4 of 4 for MIDR_EL1 (0.09 sec)
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src/internal/cpu/cpu_arm64.s
TEXT ·getisar0(SB),NOSPLIT,$0 // get Instruction Set Attributes 0 into R0 MRS ID_AA64ISAR0_EL1, R0 MOVD R0, ret+0(FP) RET // func getMIDR() uint64 TEXT ·getMIDR(SB), NOSPLIT, $0-8 MRS MIDR_EL1, R0 MOVD R0, ret+0(FP)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Nov 02 15:23:43 UTC 2020 - 439 bytes - Viewed (0) -
src/cmd/internal/obj/arm64/sysRegEnc.go
{"MDCCSR_EL0", REG_MDCCSR_EL0, 0x130100, SR_READ}, {"MDRAR_EL1", REG_MDRAR_EL1, 0x101000, SR_READ}, {"MDSCR_EL1", REG_MDSCR_EL1, 0x100240, SR_READ | SR_WRITE}, {"MIDR_EL1", REG_MIDR_EL1, 0x180000, SR_READ}, {"MPAM0_EL1", REG_MPAM0_EL1, 0x18a520, SR_READ | SR_WRITE}, {"MPAM1_EL1", REG_MPAM1_EL1, 0x18a500, SR_READ | SR_WRITE}, {"MPAMIDR_EL1", REG_MPAMIDR_EL1, 0x18a480, SR_READ},
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Oct 08 16:20:53 UTC 2019 - 35.4K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/arm64error.s
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Dec 08 03:28:17 UTC 2023 - 37.8K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/arm64.s
MRS MDCCSR_EL0, R19 // 130133d5 MRS MDRAR_EL1, R12 // 0c1030d5 MRS MDSCR_EL1, R15 // 4f0230d5 MSR R15, MDSCR_EL1 // 4f0210d5 MRS MIDR_EL1, R26 // 1a0038d5 MRS MPIDR_EL1, R25 // b90038d5 MRS MVFR0_EL1, R29 // 1d0338d5 MRS MVFR1_EL1, R7 // 270338d5
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Dec 08 03:28:17 UTC 2023 - 94.9K bytes - Viewed (0)