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Results 1 - 2 of 2 for IsRecv (0.07 sec)
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tensorflow/compiler/jit/build_xla_ops_pass.cc
std::vector<Node*> xla_compiled_kernels; absl::c_copy_if(graph->op_nodes(), std::back_inserter(xla_compiled_kernels), [](const Node* n) { if (n->IsSend() || n->IsRecv() || n->IsControlFlow()) { return false; } // Only compile nodes that are marked for compilation by the
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Tue Mar 12 06:33:33 UTC 2024 - 24.3K bytes - Viewed (0) -
tensorflow/compiler/jit/deadness_analysis.cc
} else if (n->IsControlTrigger()) { SetPredicate(n, Graph::kControlSlot, predicate_factory_.MakeTrue(), nullptr); } else if (n->IsRecv() || n->IsHostRecv()) { TF_RETURN_IF_ERROR(HandleRecv(n, should_revisit)); } else if (n->IsNextIteration()) { TF_RETURN_IF_ERROR(HandleGeneric(n, should_revisit)); } else {
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Tue Mar 12 06:33:33 UTC 2024 - 60.4K bytes - Viewed (0)