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src/cmd/asm/internal/asm/parse.go
case lex.LSH: op = 0 case lex.RSH: op = 1 case lex.ARR: op = 2 case lex.ROT: // following instructions on ARM64 support rotate right // AND, ANDS, TST, BIC, BICS, EON, EOR, ORR, MVN, ORN op = 3 } tok := p.next() str := tok.String() var count int16 switch tok.ScanToken { case scanner.Ident: if p.arch.Family == sys.ARM64 { p.errorf("rhs of shift must be integer: %s", str)
Go - Registered: Tue Apr 30 11:13:12 GMT 2024 - Last Modified: Wed Feb 21 14:34:57 GMT 2024 - 36.9K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/riscv64.s
MAXU X28, X29, X30 // 33ffce0b MAXU X28, X29 // b3fece0b MIN X29, X30, X5 // b342df0b MIN X29, X30 // 334fdf0b MINU X30, X5, X6 // 33d3e20b MINU X30, X5 // b3d2e20b ORN X6, X7, X8 // 33e46340 ORN X6, X7 // b3e36340 SEXTB X16, X17 // 93184860 SEXTH X17, X18 // 13995860 XNOR X18, X19, X20 // 33ca2941 XNOR X18, X19 // b3c92941 ZEXTH X19, X20 // 3bca0908
Others - Registered: Tue Apr 30 11:13:12 GMT 2024 - Last Modified: Fri Mar 22 04:42:21 GMT 2024 - 16.7K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/ppc64.s
ANDCC R3, R4, R5 // 7c851839 ANDNCC R3, R4, R5 // 7c851879 OR R3, R4 // 7c841b78 OR R3, R4, R5 // 7c851b78 ORN R3, R4, R5 // 7c851b38 ORCC R3, R4, R5 // 7c851b79 ORNCC R3, R4, R5 // 7c851b39 XOR R3, R4 // 7c841a78 XOR R3, R4, R5 // 7c851a78
Others - Registered: Tue Apr 30 11:13:12 GMT 2024 - Last Modified: Wed Apr 24 15:53:25 GMT 2024 - 49K bytes - Viewed (0)