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src/cmd/asm/internal/asm/testdata/arm.s
#include "../../../../../runtime/textflag.h" TEXT foo(SB), DUPOK|NOSPLIT, $0 // ADD // // LTYPE1 cond imsr ',' spreg ',' reg // { // outcode($1, $2, &$3, $5, &$7); // } // Cover some operand space here too. ADD $1, R2, R3 ADD R1<<R2, R3, R4 ADD R1>>R2, R3, R4 ADD R1@>R2, R3, R4 ADD R1->R2, R3, R4 ADD R1, R2, R3 ADD R(1)<<R(2), R(3), R(4) // ADD R1<<R2, R3, R4
Others - Registered: Tue Apr 30 11:13:12 GMT 2024 - Last Modified: Fri Dec 15 20:51:01 GMT 2023 - 69K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/arm64.s
FMOVD 0x1006ff8(R1), F2 // FMOVD 16805880(R1), F2 // 3bfc7f9162ff7ffd // very large or unaligned offset uses constant pool. // the encoding cannot be checked as the address of the constant pool is unknown. // here we only test that they can be assembled. MOVB R1, 0x1000000(R2) // MOVB R1, 16777216(R2) MOVB R1, 0x44332211(R2) // MOVB R1, 1144201745(R2) MOVH R1, 0x1001000(R2) // MOVH R1, 16781312(R2)
Others - Registered: Tue Apr 30 11:13:12 GMT 2024 - Last Modified: Fri Dec 08 03:28:17 GMT 2023 - 94.9K bytes - Viewed (0)