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Results 1 - 5 of 5 for Haddad (0.14 sec)

  1. src/cmd/asm/internal/asm/testdata/ppc64.s

    	REMU R3, R4, R5                 // 7fe41b967fff19d67bff00287cbf2050
    	REMD R3, R4, R5                 // 7fe41bd27fff19d27cbf2050
    	REMDU R3, R4, R5                // 7fe41b927fff19d27cbf2050
    
    	MADDHD R3,R4,R5,R6              // 10c32170
    	MADDHDU R3,R4,R5,R6             // 10c32171
    
    	MODUD R3, R4, R5                // 7ca41a12
    	MODUW R3, R4, R5                // 7ca41a16
    	MODSD R3, R4, R5                // 7ca41e12
    Others
    - Registered: Tue Apr 30 11:13:12 GMT 2024
    - Last Modified: Wed Apr 24 15:53:25 GMT 2024
    - 49K bytes
    - Viewed (0)
  2. src/cmd/asm/internal/asm/testdata/arm64.s

    	SWPLH	R5, (RSP), R7                        // e7836578
    	SWPLB	R5, (R6), R7                         // c7806538
    	SWPLB	R5, (RSP), R7                        // e7836538
    	LDADDAD	R5, (R6), R7                         // c700a5f8
    	LDADDAD	R5, (RSP), R7                        // e703a5f8
    	LDADDAW	R5, (R6), R7                         // c700a5b8
    	LDADDAW	R5, (RSP), R7                        // e703a5b8
    Others
    - Registered: Tue Apr 30 11:13:12 GMT 2024
    - Last Modified: Fri Dec 08 03:28:17 GMT 2023
    - 94.9K bytes
    - Viewed (0)
  3. src/cmd/asm/internal/asm/testdata/arm.s

    //	}
    	ABSF	F1, F2
    
    //	LTYPEK cond frcon ',' freg
    //	{
    //		outcode($1, $2, &$3, 0, &$5);
    //	}
    	ADDD	F1, F2
    	MOVF	$0.5, F2 // MOVF $(0.5), F2
    
    //	LTYPEK cond frcon ',' LFREG ',' freg
    //	{
    //		outcode($1, $2, &$3, $5, &$7);
    //	}
    	ADDD	F1, F2, F3
    
    //	LTYPEL cond freg ',' freg
    //	{
    //		outcode($1, $2, &$3, int32($5.Reg), &nullgen);
    //	}
    	CMPD	F1, F2
    
    //
    Others
    - Registered: Tue Apr 30 11:13:12 GMT 2024
    - Last Modified: Fri Dec 15 20:51:01 GMT 2023
    - 69K bytes
    - Viewed (0)
  4. src/cmd/asm/internal/asm/testdata/riscv64.s

    	FLD	(X5), F0				// 07b00200
    	FLD	4(X5), F0				// 07b04200
    	FSD	F0, (X5)				// 27b00200
    	FSD	F0, 4(X5)				// 27b20200
    
    	// 12.4: Double-Precision Floating-Point Computational Instructions
    	FADDD	F1, F0, F2				// 53011002
    	FSUBD	F1, F0, F2				// 5301100a
    	FMULD	F1, F0, F2				// 53011012
    	FDIVD	F1, F0, F2				// 5301101a
    	FMIND	F1, F0, F2				// 5301102a
    	FMAXD	F1, F0, F2				// 5311102a
    Others
    - Registered: Tue Apr 30 11:13:12 GMT 2024
    - Last Modified: Fri Mar 22 04:42:21 GMT 2024
    - 16.7K bytes
    - Viewed (1)
  5. src/cmd/asm/internal/asm/testdata/arm64error.s

    	FMOVS	(F2), F0                                         // ERROR "illegal combination"
    	FMOVD	F0, (F1)                                         // ERROR "illegal combination"
    	LDADDAD	R5, (R6), RSP                                    // ERROR "illegal combination"
    	LDADDAW	R5, (R6), RSP                                    // ERROR "illegal combination"
    Others
    - Registered: Tue Apr 30 11:13:12 GMT 2024
    - Last Modified: Fri Dec 08 03:28:17 GMT 2023
    - 37.8K bytes
    - Viewed (0)
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