// zero upper bit of the register; no need to zero-extend
(MOVBUreg x:((Equal|NotEqual|LessThan|LessThanU|LessThanF|LessEqual|LessEqualU|LessEqualF|GreaterThan|GreaterThanU|GreaterThanF|GreaterEqual|GreaterEqualU|GreaterEqualF) _)) => x

// omit unsigned extension
(MOVWUreg x) && zeroUpper32Bits(x, 3) => x

// don't extend after proper load
(MOVBreg  x:(MOVBload  _ _)) => (MOVDreg x)
(MOVBUreg x:(MOVBUload _ _)) => (MOVDreg x)

	}
	// match: (MOVBUreg x:(GreaterEqualU _))
	// result: x
	for {
		x := v_0
		if x.Op != OpARM64GreaterEqualU {
			break
		}
		v.copyOf(x)
		return true
	}
	// match: (MOVBUreg x:(GreaterEqualF _))
	// result: x
	for {
		x := v_0
		if x.Op != OpARM64GreaterEqualF {
			break
		}
		v.copyOf(x)
		return true
	}
	// match: (MOVBUreg x:(MOVBUload _ _))
	// result: (MOVDreg x)

(GreaterEqualU    (InvertFlags x)) => (LessEqualU x)
(LessThanF        (InvertFlags x)) => (GreaterThanF x)
(LessEqualF       (InvertFlags x)) => (GreaterEqualF x)
(GreaterThanF     (InvertFlags x)) => (LessThanF x)
(GreaterEqualF    (InvertFlags x)) => (LessEqualF x)
(LessThanNoov     (InvertFlags x)) => (CSEL0 [OpARM64NotEqual] (GreaterEqualNoov <typ.Bool> x) x)

		{name: "GreaterThanF", argLength: 1, reg: readflags},     // bool, true flags encode floating-point x>y false otherwise.
		{name: "GreaterEqualF", argLength: 1, reg: readflags},    // bool, true flags encode floating-point x>=y false otherwise.

		x := v_0.Args[0]
		v.reset(OpARM64LessEqual)
		v.AddArg(x)
		return true
	}
	return false
}
func rewriteValueARM64_OpARM64GreaterEqualF(v *Value) bool {
	v_0 := v.Args[0]
	// match: (GreaterEqualF (InvertFlags x))
	// result: (LessEqualF x)
	for {
		if v_0.Op != OpARM64InvertFlags {
			break
		}
		x := v_0.Args[0]
		v.reset(OpARM64LessEqualF)
		v.AddArg(x)
		return true
	}

		reg: regInfo{
			outputs: []outputInfo{
				{0, 670826495}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R19 R20 R21 R22 R23 R24 R25 R26 R30
			},
		},
	},
	{
		name:   "GreaterEqualF",
		argLen: 1,
		reg: regInfo{
			outputs: []outputInfo{
				{0, 670826495}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R19 R20 R21 R22 R23 R24 R25 R26 R30
			},
		},
	},