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Results 1 - 8 of 8 for FusedBatchNormGradV3 (0.42 sec)
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tensorflow/compiler/mlir/tensorflow/tests/layout_optimization_layout_assignment_gpu_cc_60.mlir
%arg1: tensor<1x28x28x64xf32>, %arg2: tensor<64xf32> ) -> tensor<1x28x28x64xf32> { // CHECK: "tf.FusedBatchNormGradV3" // CHECK-SAME: (%[[X_TRANSPOSE:[0-9]*]], %[[Y_TRANSPOSE:[0-9]*]], // CHECK-SAME: data_format = "NCHW" %x_backprop, %scale_backprop, %offset_backprop, %reserve_1, %reserve_2 = "tf.FusedBatchNormGradV3"(%arg0, %arg1, %arg2, %arg2, %arg2, %arg2) { data_format = "NHWC",
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Tue Jun 21 08:41:18 UTC 2022 - 5.8K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/layout_optimization_layout_assignment_gpu_cc_70.mlir
%arg1: tensor<1x28x28x64xf32>, %arg2: tensor<64xf32> ) -> tensor<1x28x28x64xf32> { // CHECK: "tf.FusedBatchNormGradV3" // CHECK-SAME: (%[[X_TRANSPOSE:[0-9]*]], %[[Y_TRANSPOSE:[0-9]*]], // CHECK-SAME: data_format = "NCHW" %x_backprop, %scale_backprop, %offset_backprop, %reserve_1, %reserve_2 = "tf.FusedBatchNormGradV3"(%arg0, %arg1, %arg2, %arg2, %arg2, %arg2) { data_format = "NHWC",
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Tue Jun 21 08:41:18 UTC 2022 - 8.5K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/layout_optimization_layout_assignment_to_nchw.mlir
// CHECK: %[[ARG0_TPOSE:[0-9]*]] = "tf.Transpose"(%arg0, %[[ARG_PERM]]) // CHECK: %[[ARG1_TPOSE:[0-9]*]] = "tf.Transpose"(%arg1, %[[ARG_PERM]]) // CHECK: "tf.FusedBatchNormGradV3" // CHECK-SAME: (%[[ARG0_TPOSE]], %[[ARG1_TPOSE]], %arg2, %arg2, %arg2, %arg2) // CHECK-SAME: data_format = "NCHW" // CHECK-SAME: (tensor<1x64x28x28xf32>, tensor<1x64x28x28xf32>,
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Mon Oct 30 06:52:55 UTC 2023 - 9K bytes - Viewed (0) -
tensorflow/cc/gradients/nn_grad.cc
StringPiece data_format, bool is_training, std::vector<Output>* grad_outputs) { FusedBatchNormGradV3 grad( scope, grad_y, x, scale, reserve_spaces[0], reserve_spaces[1], reserve_spaces[2], FusedBatchNormGradAttrs<FusedBatchNormGradV3::Attrs>( epsilon, data_format, is_training)); grad_outputs->push_back(grad.x_backprop);
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Fri May 27 23:34:33 UTC 2022 - 24.5K bytes - Viewed (0) -
tensorflow/compiler/mlir/tf2xla/tests/legalize-tf-with-tf2xla-hlo-importer.mlir
// CHECK: %[[x_backprop:.*]] = mhlo.convert %[[mul3]] : tensor<8x8x8x8xf32> // CHECK: return %[[x_backprop]] : tensor<8x8x8x8xf32>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Sat Apr 06 15:32:52 UTC 2024 - 38.6K bytes - Viewed (0) -
tensorflow/compiler/mlir/tf2xla/tests/legalize-tf.mlir
// CHECK-NEXT: %[[x_backprop:.*]] = mhlo.convert %[[mul3]] : tensor<8x8x8x8xf32> // CHECK-NEXT: return %[[x_backprop]] : tensor<8x8x8x8xf32>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Mon May 06 18:46:23 UTC 2024 - 335.5K bytes - Viewed (0) -
tensorflow/compiler/jit/mark_for_compilation_pass.cc
{"BN", {"FusedBatchNorm", "FusedBatchNormV2", "FusedBatchNormV3", "_FusedBatchNormEx", "FusedBatchNormGrad", "FusedBatchNormGradV2", "FusedBatchNormGradV3"}}, {"Conv", {"_FusedConv2D"}}, {"SORT", {"TopKV2"}}, // XLA version much faster then TF version. {"MISC", // clang-format off
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Wed Feb 21 12:19:41 UTC 2024 - 85.3K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/ir/tf_generated_ops.td
); TF_DerivedOperandTypeAttr T = TF_DerivedOperandTypeAttr<0>; TF_DerivedOperandTypeAttr U = TF_DerivedOperandTypeAttr<3>; } def TF_FusedBatchNormGradV3Op : TF_Op<"FusedBatchNormGradV3", [Pure, TF_LayoutSensitiveInterface]> { let summary = "Gradient for batch normalization."; let description = [{ Note that the size of 4D Tensors are defined by either "NHWC" or "NCHW".
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Tue Jun 11 23:24:08 UTC 2024 - 793K bytes - Viewed (0)