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src/cmd/asm/internal/asm/testdata/mips.s
// { // outcode(int($1), &$2, int($4.Reg), &$6); // } ADDD F1, F2, F3 // LFCMP freg ',' freg // { // outcode(int($1), &$2, 0, &$4); // } CMPEQD F1, F2 // // WORD // WORD $1 // // NOP // // LNOP comma // asm doesn't support the trailing comma. // { // outcode(int($1), &nullgen, 0, &nullgen); // } NOP
Others - Registered: Tue Apr 30 11:13:12 GMT 2024 - Last Modified: Tue Aug 08 12:17:12 GMT 2023 - 6.7K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/loong64enc1.s
MOVW F4, 1(F5) // a404402b MOVF F4, 1(F5) // a404402b MOVD F4, 1(F5) // a404c02b MOVW R4, F5 // 85a41401 MOVW F4, R5 // 85b41401 MOVV R4, F5 // 85a81401 MOVV F4, R5 // 85b81401 WORD $74565 // 45230100 BREAK R4, result+16(FP) // 64600006 BREAK R4, 1(R5) // a4040006 BREAK // 00002a00 UNDEF // 00002a00 // mul MUL R4, R5 // a5101c00 MUL R4, R5, R6 // a6101c00
Others - Registered: Tue Apr 30 11:13:12 GMT 2024 - Last Modified: Fri Mar 31 02:56:19 GMT 2023 - 6.4K bytes - Viewed (0)