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Results 1 - 10 of 13 for AtomicOr8 (0.14 sec)

  1. src/cmd/compile/internal/ssa/_gen/MIPS.rules

    (AtomicExchange32 ...) => (LoweredAtomicExchange ...)
    (AtomicAdd32 ...) => (LoweredAtomicAdd ...)
    
    (AtomicCompareAndSwap32 ...) => (LoweredAtomicCas ...)
    
    // AtomicOr8(ptr,val)  =>   LoweredAtomicOr(ptr&^3,uint32(val) << ((ptr & 3) * 8))
    (AtomicOr8 ptr val mem) && !config.BigEndian =>
    	(LoweredAtomicOr (AND <typ.UInt32Ptr> (MOVWconst [^3]) ptr)
    		(SLL <typ.UInt32> (ZeroExt8to32 val)
    			(SLLconst <typ.UInt32> [3]
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 24 14:43:03 UTC 2023
    - 35.3K bytes
    - Viewed (0)
  2. src/cmd/compile/internal/ssa/_gen/MIPS64.rules

    (AtomicCompareAndSwap32 ptr old new mem) => (LoweredAtomicCas32 ptr (SignExt32to64 old) new mem)
    (AtomicCompareAndSwap64 ...) => (LoweredAtomicCas64 ...)
    
    // AtomicOr8(ptr,val)  =>   LoweredAtomicOr32(ptr&^3,uint32(val) << ((ptr & 3) * 8))
    (AtomicOr8 ptr val mem) && !config.BigEndian =>
    	(LoweredAtomicOr32 (AND <typ.UInt32Ptr> (MOVVconst [^3]) ptr)
    		(SLLV <typ.UInt32> (ZeroExt8to32 val)
    			(SLLVconst <typ.UInt64> [3]
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Jul 31 03:59:48 UTC 2023
    - 41.9K bytes
    - Viewed (0)
  3. src/runtime/runtime1.go

    		throw("cas5")
    	}
    	if z != 0xfffffffe {
    		throw("cas6")
    	}
    
    	m = [4]byte{1, 1, 1, 1}
    	atomic.Or8(&m[1], 0xf0)
    	if m[0] != 1 || m[1] != 0xf1 || m[2] != 1 || m[3] != 1 {
    		throw("atomicor8")
    	}
    
    	m = [4]byte{0xff, 0xff, 0xff, 0xff}
    	atomic.And8(&m[1], 0x1)
    	if m[0] != 0xff || m[1] != 0x1 || m[2] != 0xff || m[3] != 0xff {
    		throw("atomicand8")
    	}
    
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu May 30 17:52:17 UTC 2024
    - 19.3K bytes
    - Viewed (0)
  4. src/cmd/compile/internal/ssa/_gen/RISCV64.rules

    (AtomicCompareAndSwap64 ...) => (LoweredAtomicCas64 ...)
    
    (AtomicExchange(64|32) ...) => (LoweredAtomicExchange(64|32) ...)
    
    // AtomicOr8(ptr,val)  => LoweredAtomicOr32(ptr&^3, uint32(val)<<((ptr&3)*8))
    (AtomicOr8 ptr val mem) =>
    	(LoweredAtomicOr32 (ANDI <typ.Uintptr> [^3] ptr)
    		(SLL <typ.UInt32> (ZeroExt8to32 val)
    			(SLLI <typ.UInt64> [3] (ANDI <typ.UInt64> [3] ptr))) mem)
    
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Mar 07 14:57:07 UTC 2024
    - 40.3K bytes
    - Viewed (0)
  5. src/cmd/compile/internal/ssa/_gen/genericOps.go

    	{name: "AtomicAnd8", argLength: 3, typ: "(Uint8, Mem)", hasSideEffects: true},              // *arg0 &= arg1.  arg2=memory.  Returns old contents of *arg0 and new memory.
    	{name: "AtomicOr8", argLength: 3, typ: "(Uint8, Mem)", hasSideEffects: true},               // *arg0 |= arg1.  arg2=memory.  Returns old contents of *arg0 and new memory.
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu May 23 15:49:20 UTC 2024
    - 42.6K bytes
    - Viewed (0)
  6. src/cmd/compile/internal/ssa/_gen/S390X.rules

    //
    // Round pointer down to nearest word boundary and pad value with zeros before
    // applying atomic OR operation to target word.
    //
    // *(*uint32)(ptr &^ 3) |= uint32(val) << ((3 << 3) ^ ((ptr & 3) << 3))
    //
    (AtomicOr8  ptr val mem)
      => (LAOfloor
           ptr
           (SLW <typ.UInt32>
             (MOVBZreg <typ.UInt32> val)
             (RXSBG <typ.UInt32> {s390x.NewRotateParams(59, 60, 3)} (MOVDconst [3<<3]) ptr))
           mem)
    
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Oct 12 18:09:26 UTC 2023
    - 74.3K bytes
    - Viewed (0)
  7. src/cmd/compile/internal/ssa/rewriteMIPS.go

    }
    func rewriteValueMIPS_OpAtomicOr8(v *Value) bool {
    	v_2 := v.Args[2]
    	v_1 := v.Args[1]
    	v_0 := v.Args[0]
    	b := v.Block
    	config := b.Func.Config
    	typ := &b.Func.Config.Types
    	// match: (AtomicOr8 ptr val mem)
    	// cond: !config.BigEndian
    	// result: (LoweredAtomicOr (AND <typ.UInt32Ptr> (MOVWconst [^3]) ptr) (SLL <typ.UInt32> (ZeroExt8to32 val) (SLLconst <typ.UInt32> [3] (ANDconst <typ.UInt32> [3] ptr))) mem)
    	for {
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 24 14:43:03 UTC 2023
    - 176.6K bytes
    - Viewed (0)
  8. src/cmd/compile/internal/ssa/_gen/AMD64.rules

    (AtomicCompareAndSwap64 ptr old new_ mem) => (CMPXCHGQlock ptr old new_ mem)
    
    // Atomic memory updates.
    (AtomicAnd8  ptr val mem) => (ANDBlock ptr val mem)
    (AtomicAnd32 ptr val mem) => (ANDLlock ptr val mem)
    (AtomicOr8   ptr val mem) => (ORBlock  ptr val mem)
    (AtomicOr32  ptr val mem) => (ORLlock  ptr val mem)
    
    // Write barrier.
    (WB ...) => (LoweredWB ...)
    
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Mar 12 19:38:41 UTC 2024
    - 93.9K bytes
    - Viewed (0)
  9. src/cmd/compile/internal/ssa/rewriteMIPS64.go

    	}
    }
    func rewriteValueMIPS64_OpAtomicOr8(v *Value) bool {
    	v_2 := v.Args[2]
    	v_1 := v.Args[1]
    	v_0 := v.Args[0]
    	b := v.Block
    	config := b.Func.Config
    	typ := &b.Func.Config.Types
    	// match: (AtomicOr8 ptr val mem)
    	// cond: !config.BigEndian
    	// result: (LoweredAtomicOr32 (AND <typ.UInt32Ptr> (MOVVconst [^3]) ptr) (SLLV <typ.UInt32> (ZeroExt8to32 val) (SLLVconst <typ.UInt64> [3] (ANDconst <typ.UInt64> [3] ptr))) mem)
    	for {
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Jul 31 03:59:48 UTC 2023
    - 211.6K bytes
    - Viewed (0)
  10. src/cmd/compile/internal/ssa/rewriteRISCV64.go

    		return true
    	}
    }
    func rewriteValueRISCV64_OpAtomicOr8(v *Value) bool {
    	v_2 := v.Args[2]
    	v_1 := v.Args[1]
    	v_0 := v.Args[0]
    	b := v.Block
    	typ := &b.Func.Config.Types
    	// match: (AtomicOr8 ptr val mem)
    	// result: (LoweredAtomicOr32 (ANDI <typ.Uintptr> [^3] ptr) (SLL <typ.UInt32> (ZeroExt8to32 val) (SLLI <typ.UInt64> [3] (ANDI <typ.UInt64> [3] ptr))) mem)
    	for {
    		ptr := v_0
    		val := v_1
    		mem := v_2
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Mar 07 14:57:07 UTC 2024
    - 205.1K bytes
    - Viewed (0)
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