// Copyright 2021 The Go Authors. All rights reserved.
// Use of this source code is governed by a BSD-style
// license that can be found in the LICENSE file.

package codegen

func andn64(x, y int64) int64 {
	// amd64/v3:"ANDNQ"
	return x &^ y
}

func andn32(x, y int32) int32 {
	// amd64/v3:"ANDNL"
	return x &^ y
}

func blsi64(x int64) int64 {
	// amd64/v3:"BLSIQ"
	return x & -x
}

func blsi32(x int32) int32 {

	"ADDW",
	"ADJSP",
	"ADOXL",
	"ADOXQ",
	"AESDEC",
	"AESDECLAST",
	"AESENC",
	"AESENCLAST",
	"AESIMC",
	"AESKEYGENASSIST",
	"ANDB",
	"ANDL",
	"ANDNL",
	"ANDNPD",
	"ANDNPS",
	"ANDNQ",
	"ANDPD",
	"ANDPS",
	"ANDQ",
	"ANDW",
	"ARPL",
	"BEXTRL",
	"BEXTRQ",
	"BLENDPD",
	"BLENDPS",
	"BLENDVPD",
	"BLENDVPS",
	"BLSIL",
	"BLSIQ",
	"BLSMSKL",
	"BLSMSKQ",
	"BLSRL",

	// go tool objdump doesn't include a [QL] on popcnt instructions, until CL 351889
	// native objdump doesn't include [QL] on linux.
	"popcnt": {"popcntq", "popcntl", "popcnt"},
	"bmi1": {
		"andnq", "andnl", "andn",
		"blsiq", "blsil", "blsi",
		"blsmskq", "blsmskl", "blsmsk",
		"blsrq", "blsrl", "blsr",
		"tzcntq", "tzcntl", "tzcnt",
	},
	"bmi2": {
		"sarxq", "sarxl", "sarx",

	ANDNL R11, R9, R11                      // c44230f2db
	ANDNQ (BX), R14, DX                     // c4e288f213
	ANDNQ (R11), R14, DX                    // c4c288f213
	ANDNQ DX, R14, DX                       // c4e288f2d2
	ANDNQ R11, R14, DX                      // c4c288f2d3
	ANDNQ (BX), R14, R11                    // c46288f21b
	ANDNQ (R11), R14, R11                   // c44288f21b
	ANDNQ DX, R14, R11                      // c46288f2da

		{name: "PrefetchNTA", argLength: 2, reg: prefreg, asm: "PREFETCHNTA", hasSideEffects: true},

		// CPUID feature: BMI1.
		{name: "ANDNQ", argLength: 2, reg: gp21, asm: "ANDNQ", clobberFlags: true},         // arg0 &^ arg1
		{name: "ANDNL", argLength: 2, reg: gp21, asm: "ANDNL", clobberFlags: true},         // arg0 &^ arg1

		}
		v.reset(OpAMD64BTRL)
		v.AddArg2(x, y)
		return true
	}
	return false
}
func rewriteValueAMD64_OpAMD64ANDNQ(v *Value) bool {
	v_1 := v.Args[1]
	v_0 := v.Args[0]
	// match: (ANDNQ x (SHLQ (MOVQconst [1]) y))
	// result: (BTRQ x y)
	for {
		x := v_0
		if v_1.Op != OpAMD64SHLQ {
			break
		}
		y := v_1.Args[1]
		v_1_0 := v_1.Args[0]

		asm:            x86.APREFETCHNTA,
		reg: regInfo{
			inputs: []inputInfo{
				{0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
			},
		},
	},
	{
		name:         "ANDNQ",
		argLen:       2,
		clobberFlags: true,
		asm:          x86.AANDNQ,
		reg: regInfo{
			inputs: []inputInfo{
				{0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15