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Results 1 - 10 of 11 for AMULW (0.05 sec)

  1. src/cmd/internal/obj/loong64/a.out.go

    	AMOVDW
    	AMOVF
    	AMOVFD
    	AMOVFW
    
    	AMOVH
    	AMOVHU
    	AMOVW
    
    	AMOVWD
    	AMOVWF
    
    	AMOVWL
    	AMOVWR
    
    	AMUL
    	AMULD
    	AMULF
    	AMULU
    	AMULH
    	AMULHU
    	AMULW
    	ANEGD
    	ANEGF
    
    	ANEGW
    	ANEGV
    
    	ANOOP // hardware nop
    	ANOR
    	AOR
    	AREM
    	AREMU
    
    	ARFE
    
    	ASC
    	ASCV
    
    	ASGT
    	ASGTU
    
    	ASLL
    	ASQRTD
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 22 02:04:54 UTC 2024
    - 5.7K bytes
    - Viewed (0)
  2. src/cmd/internal/obj/mips/a.out.go

    	AMOVBU
    	AMOVD
    	AMOVDF
    	AMOVDW
    	AMOVF
    	AMOVFD
    	AMOVFW
    	AMOVH
    	AMOVHU
    	AMOVW
    	AMOVWD
    	AMOVWF
    	AMOVWL
    	AMOVWR
    	AMSUB
    	AMUL
    	AMULD
    	AMULF
    	AMULU
    	AMULW
    	ANEGD
    	ANEGF
    	ANEGW
    	ANEGV
    	ANOOP // hardware nop
    	ANOR
    	AOR
    	AREM
    	AREMU
    	ARFE
    	AROTR
    	AROTRV
    	ASC
    	ASCV
    	ASEB
    	ASEH
    	ASGT
    	ASGTU
    	ASLL
    	ASQRTD
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Aug 08 12:17:12 UTC 2023
    - 7.6K bytes
    - Viewed (0)
  3. src/cmd/internal/obj/x86/aenum.go

    	AMOVSW
    	AMOVSWW
    	AMOVUPD
    	AMOVUPS
    	AMOVW
    	AMOVWLSX
    	AMOVWLZX
    	AMOVWQSX
    	AMOVWQZX
    	AMOVZWW
    	AMPSADBW
    	AMULB
    	AMULL
    	AMULPD
    	AMULPS
    	AMULQ
    	AMULSD
    	AMULSS
    	AMULW
    	AMULXL
    	AMULXQ
    	AMWAIT
    	ANEGB
    	ANEGL
    	ANEGQ
    	ANEGW
    	ANOPL
    	ANOPW
    	ANOTB
    	ANOTL
    	ANOTQ
    	ANOTW
    	AORB
    	AORL
    	AORPD
    	AORPS
    	AORQ
    	AORW
    	AOUTB
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Apr 11 18:32:50 UTC 2023
    - 16.3K bytes
    - Viewed (0)
  4. src/cmd/internal/obj/riscv/cpu.go

    	ASRAIW
    	AADDW
    	ASLLW
    	ASRLW
    	ASUBW
    	ASRAW
    
    	// 5.3: Load and Store Instructions (RV64I)
    	ALD
    	ASD
    
    	// 7.1: Multiplication Operations
    	AMUL
    	AMULH
    	AMULHU
    	AMULHSU
    	AMULW
    	ADIV
    	ADIVU
    	AREM
    	AREMU
    	ADIVW
    	ADIVUW
    	AREMW
    	AREMUW
    
    	// 8.2: Load-Reserved/Store-Conditional Instructions
    	ALRD
    	ASCD
    	ALRW
    	ASCW
    
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed Mar 20 14:19:33 UTC 2024
    - 13.1K bytes
    - Viewed (0)
  5. src/cmd/internal/obj/riscv/inst.go

    		return &inst{0x33, 0x0, 0x0, 32, 0x1}
    	case AMULH:
    		return &inst{0x33, 0x1, 0x0, 32, 0x1}
    	case AMULHSU:
    		return &inst{0x33, 0x2, 0x0, 32, 0x1}
    	case AMULHU:
    		return &inst{0x33, 0x3, 0x0, 32, 0x1}
    	case AMULW:
    		return &inst{0x3b, 0x0, 0x0, 32, 0x1}
    	case AOR:
    		return &inst{0x33, 0x6, 0x0, 0, 0x0}
    	case AORCB:
    		return &inst{0x13, 0x5, 0x7, 647, 0x14}
    	case AORI:
    		return &inst{0x13, 0x6, 0x0, 0, 0x0}
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed Mar 20 14:19:33 UTC 2024
    - 13.9K bytes
    - Viewed (0)
  6. src/cmd/internal/obj/arm64/a.out.go

    	AMOVK
    	AMOVKW
    	AMOVN
    	AMOVNW
    	AMOVP
    	AMOVPD
    	AMOVPQ
    	AMOVPS
    	AMOVPSW
    	AMOVPW
    	AMOVW
    	AMOVWU
    	AMOVZ
    	AMOVZW
    	AMRS
    	AMSR
    	AMSUB
    	AMSUBW
    	AMUL
    	AMULW
    	AMVN
    	AMVNW
    	ANEG
    	ANEGS
    	ANEGSW
    	ANEGW
    	ANGC
    	ANGCS
    	ANGCSW
    	ANGCW
    	ANOOP
    	AORN
    	AORNW
    	AORR
    	AORRW
    	APRFM
    	APRFUM
    	ARBIT
    	ARBITW
    	AREM
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed Oct 18 17:56:30 UTC 2023
    - 18.1K bytes
    - Viewed (0)
  7. src/cmd/internal/obj/mips/obj0.go

    		ASRAV,
    		ASRLV,
    		ASUB,
    		ASUBU,
    		ASUBV,
    		ASUBVU,
    		AXOR,
    
    		AADDD,
    		AADDF,
    		AADDW,
    		ASUBD,
    		ASUBF,
    		ASUBW,
    		AMULF,
    		AMULD,
    		AMULW,
    		ADIVF,
    		ADIVD,
    		ADIVW:
    		if p.Reg == 0 {
    			if p.To.Type == obj.TYPE_REG {
    				p.Reg = p.To.Reg
    			}
    			//if(p->reg == NREG)
    			//	print("botch %P\n", p);
    		}
    	}
    
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Apr 21 19:28:53 UTC 2023
    - 30.6K bytes
    - Viewed (0)
  8. src/cmd/internal/obj/riscv/obj.go

    		case AADDI, ASLTI, ASLTIU, AANDI, AORI, AXORI, ASLLI, ASRLI, ASRAI,
    			AADDIW, ASLLIW, ASRLIW, ASRAIW, AADDW, ASUBW, ASLLW, ASRLW, ASRAW,
    			AADD, AAND, AOR, AXOR, ASLL, ASRL, ASUB, ASRA,
    			AMUL, AMULH, AMULHU, AMULHSU, AMULW, ADIV, ADIVU, ADIVW, ADIVUW,
    			AREM, AREMU, AREMW, AREMUW,
    			AADDUW, ASH1ADD, ASH1ADDUW, ASH2ADD, ASH2ADDUW, ASH3ADD, ASH3ADDUW, ASLLIUW,
    			AANDN, AORN, AXNOR, AMAX, AMAXU, AMIN, AMINU, AROL, AROLW, AROR, ARORW, ARORI, ARORIW,
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Sun Apr 07 03:32:27 UTC 2024
    - 77K bytes
    - Viewed (0)
  9. src/cmd/internal/obj/arm64/asm7.go

    			oprangeset(AUMADDL, t)
    			oprangeset(AUMSUBL, t)
    
    		case AREM:
    			oprangeset(AREMW, t)
    			oprangeset(AUREM, t)
    			oprangeset(AUREMW, t)
    
    		case AMUL:
    			oprangeset(AMULW, t)
    			oprangeset(AMNEG, t)
    			oprangeset(AMNEGW, t)
    			oprangeset(ASMNEGL, t)
    			oprangeset(ASMULL, t)
    			oprangeset(ASMULH, t)
    			oprangeset(AUMNEGL, t)
    			oprangeset(AUMULH, t)
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 15 15:44:14 UTC 2024
    - 201.1K bytes
    - Viewed (0)
  10. src/cmd/internal/obj/x86/asm6.go

    	{AMULPD, yxm, Pe, opBytes{0x59}},
    	{AMULPS, yxm, Ym, opBytes{0x59}},
    	{AMULQ, ydivl, Pw, opBytes{0xf7, 04}},
    	{AMULSD, yxm, Pf2, opBytes{0x59}},
    	{AMULSS, yxm, Pf3, opBytes{0x59}},
    	{AMULW, ydivl, Pe, opBytes{0xf7, 04}},
    	{ANEGB, yscond, Pb, opBytes{0xf6, 03}},
    	{ANEGL, yscond, Px, opBytes{0xf7, 03}},
    	{ANEGQ, yscond, Pw, opBytes{0xf7, 03}},
    	{ANEGW, yscond, Pe, opBytes{0xf7, 03}},
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 15 15:44:14 UTC 2024
    - 146.9K bytes
    - Viewed (0)
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