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Results 1 - 3 of 3 for ABEXTI (0.43 sec)
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src/cmd/internal/obj/riscv/cpu.go
AZEXTH // 1.3: Bitwise Rotation (Zbb) AROL AROLW AROR ARORI ARORIW ARORW AORCB AREV8 // 1.5: Single-bit Instructions (Zbs) ABCLR ABCLRI ABEXT ABEXTI ABINV ABINVI ABSET ABSETI // The escape hatch. Inserts a single 32-bit word. AWORD // Pseudo-instructions. These get translated by the assembler into other
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed Mar 20 14:19:33 UTC 2024 - 13.1K bytes - Viewed (0) -
src/cmd/internal/obj/riscv/inst.go
return &inst{0x33, 0x1, 0x0, 1152, 0x24} case ABCLRI: return &inst{0x13, 0x1, 0x0, 1152, 0x24} case ABEQ: return &inst{0x63, 0x0, 0x0, 0, 0x0} case ABEXT: return &inst{0x33, 0x5, 0x0, 1152, 0x24} case ABEXTI: return &inst{0x13, 0x5, 0x0, 1152, 0x24} case ABGE: return &inst{0x63, 0x5, 0x0, 0, 0x0} case ABGEU: return &inst{0x63, 0x7, 0x0, 0, 0x0} case ABINV: return &inst{0x33, 0x1, 0x0, 1664, 0x34}
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed Mar 20 14:19:33 UTC 2024 - 13.9K bytes - Viewed (0) -
src/cmd/internal/obj/riscv/obj.go
AREM, AREMU, AREMW, AREMUW, AADDUW, ASH1ADD, ASH1ADDUW, ASH2ADD, ASH2ADDUW, ASH3ADD, ASH3ADDUW, ASLLIUW, AANDN, AORN, AXNOR, AMAX, AMAXU, AMIN, AMINU, AROL, AROLW, AROR, ARORW, ARORI, ARORIW, ABCLR, ABCLRI, ABEXT, ABEXTI, ABINV, ABINVI, ABSET, ABSETI: p.Reg = p.To.Reg } } // Rewrite instructions with constant operands to refer to the immediate // form of the instruction. if p.From.Type == obj.TYPE_CONST { switch p.As {
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Sun Apr 07 03:32:27 UTC 2024 - 77K bytes - Viewed (0)