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Results 1 - 10 of 98 for 96xf32 (0.15 sec)

  1. tensorflow/compiler/mlir/tensorflow/tests/readonly_references_to_resources.mlir

      %val1 = "tf.Identity"(%val0) : (tensor<96x!tf_type.f32ref>) -> tensor<96xf32>
      %val2 = "tf.Identity"(%val0) : (tensor<96x!tf_type.f32ref>) -> tensor<96xf32>
      func.return
    }
    
    // -----
    
    // Test case: No follow-up ReadVariable case.
    
    func.func @f() {
      // CHECK-NOT: "tf.VariableV2"
      // CHECK-NOT: "tf.VarHandleOp"
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Mon Mar 28 12:06:33 UTC 2022
    - 4.1K bytes
    - Viewed (0)
  2. tensorflow/compiler/mlir/lite/tests/get-arithmetic-count.mlir

      func.return %0 : tensor<256x32x32x16xf32>
    }
    
    func.func @testConv2DDynamicShape(tensor<?x32x32x3xf32>, tensor<16x3x3x3xf32>, tensor<16xf32>) -> tensor<?x32x32x16xf32> {
    ^bb0(%arg0: tensor<?x32x32x3xf32>, %arg1: tensor<16x3x3x3xf32>, %arg2: tensor<16xf32>):
      // CHECK: _arithmetic_count = -1 : i64
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Wed Dec 14 04:58:17 UTC 2022
    - 7.7K bytes
    - Viewed (0)
  3. tensorflow/compiler/mlir/lite/tests/decompose-hybrid-quantization.mlir

      %1 = "tfl.pseudo_const"() { value = dense<1.0> : tensor<16xf32>} : () -> tensor<16xf32>
      %2 = "tfl.conv_3d"(%arg0, %0, %1) {dilation_h_factor = 1 : i32, dilation_w_factor = 1 : i32, dilation_d_factor = 1 : i32, fused_activation_function = "NONE", padding = "SAME", stride_h = 1 : i32, stride_w = 1 : i32, stride_d = 1 : i32} : (tensor<1x32x32x32x8xf32>, tensor<1x1x1x8x16x!quant.uniform<i8:f32, 1.0>>, tensor<16xf32>) -> tensor<1x32x32x32x16xf32>
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu May 02 09:41:17 UTC 2024
    - 13.1K bytes
    - Viewed (0)
  4. tensorflow/compiler/mlir/lite/tests/optimize.mlir

      %1 = "tfl.sum"(%0, %cst) {keep_dims = false} : (tensor<2xf32>, tensor<1xi32>) -> tensor<f32>
      %2 = "tfl.add"(%1, %cst_1) {fused_activation_function = "NONE"} : (tensor<f32>, tensor<1xf32>) -> tensor<1xf32>
      %3 = "tfl.rsqrt"(%2) : (tensor<1xf32>) -> tensor<1xf32>
      %4 = "tfl.mul"(%arg0, %3) {fused_activation_function = "NONE"} : (tensor<2xf32>, tensor<1xf32>) -> tensor<2xf32>
      func.return %4: tensor<2xf32>
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu May 16 20:31:41 UTC 2024
    - 284.1K bytes
    - Viewed (0)
  5. tensorflow/compiler/mlir/lite/tests/prepare-tf.mlir

      // Use other output
      %3:6 = "tf.FusedBatchNormV3"( %2#0, %arg1, %arg2, %arg3, %arg4) {T = "tfdtype$DT_FLOAT", U = "tfdtype$DT_FLOAT", data_format = "NHWC", epsilon = 0.001 : f32, is_training = false} : (tensor<8x8x8x8xf32>, tensor<8xf32>, tensor<8xf32>, tensor<8xf32>, tensor<8xf32>) -> (tensor<8x8x8x8xf32>, tensor<8xf32>, tensor<8xf32>, tensor<8xf32>, tensor<8xf32>, tensor<8xf32>)
    
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Wed May 29 07:26:59 UTC 2024
    - 59.8K bytes
    - Viewed (0)
  6. tensorflow/compiler/mlir/lite/experimental/tac/tests/get-op-cost.mlir

      func.return %0 : tensor<256x32x32x16xf32>
    }
    
    func.func @testConv2DGPU(tensor<256x32x32x3xf32>, tensor<16x3x3x3xf32>, tensor<16xf32>) -> tensor<256x32x32x16xf32> {
    ^bb0(%arg0: tensor<256x32x32x3xf32>, %arg1: tensor<16x3x3x3xf32>, %arg2: tensor<16xf32>):
      // CHECK: tac.cost = 0x4C300000
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu Mar 24 05:29:10 UTC 2022
    - 5.7K bytes
    - Viewed (0)
  7. tensorflow/compiler/mlir/tensorflow/tests/mlir2graphdef/fetch_feed_names.mlir

          %outputs_6, %control_7 = tf_executor.island wraps "tf.BiasAdd"(%outputs_4, %outputs_0) {data_format = "NHWC", device = ""} : (tensor<*xf32>, tensor<16xf32>) -> tensor<*xf32>
          tf_executor.fetch %outputs_6 : tensor<*xf32>
        }
        func.return %0 : tensor<*xf32>
      }
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Fri Mar 25 12:28:56 UTC 2022
    - 3K bytes
    - Viewed (0)
  8. tensorflow/compiler/mlir/lite/experimental/tac/tests/target-annotation.mlir

    // -----
    
    func.func @testAddReluPack(%arg0: tensor<1xf32>, %arg1: tensor<1xf32>) {
       // CHECK: tac.device = "GPU", tac.inference_type = "FLOAT"
      %0 = "tfl.add"(%arg0, %arg1) {fused_activation_function = "RELU6"} : (tensor<1xf32>, tensor<1xf32>) -> tensor<1xf32>
       // CHECK: tac.device = "GPU", tac.inference_type = "FLOAT"
      %1 = "tfl.add"(%arg0, %0) {fused_activation_function = "RELU"} : (tensor<1xf32>, tensor<1xf32>) -> tensor<1xf32>
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Fri May 19 19:32:06 UTC 2023
    - 6.2K bytes
    - Viewed (0)
  9. tensorflow/compiler/mlir/tensorflow/tests/tf-ops.mlir

    // CHECK-LABEL: func @testLeakyRelu(%arg0: tensor<16xf32>)
    func.func @testLeakyRelu(tensor<16xf32>) -> tensor<16xf32> {
    ^bb0(%arg0: tensor<16xf32>):
      %0 = "tf.LeakyRelu"(%arg0) {alpha = 0.2 : f32} : (tensor<16xf32>) -> tensor<16xf32>
      func.return %0 : tensor<16xf32>
    }
    
    // -----
    func.func @testLeakyWrongAlphaType(tensor<16xf32>) -> tensor<16xf32> {
    ^bb0(%arg0: tensor<16xf32>):
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Mon Oct 23 14:40:35 UTC 2023
    - 236.4K bytes
    - Viewed (0)
  10. tensorflow/compiler/mlir/lite/tests/prepare-quantize-dynamic-range.mlir

            tensor<20xf32>, tensor<20xf32>, tensor<20xf32>,
            tensor<20xf32>, tensor<20xf32>, tensor<20xf32>, tensor<20xf32>,
            tensor<20x20xf32>, none,
            tensor<1x20xf32>, tensor<1x20xf32>,
            none, none, none, none) -> tensor<1x28x20xf32>
        %1 = "quantfork.stats"(%0) {layerStats = dense<[-1.0, 2.0]> : tensor<2xf32>} : (tensor<1x28x20xf32>) -> tensor<1x28x20xf32>
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu May 02 09:41:17 UTC 2024
    - 38.2K bytes
    - Viewed (0)
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