Search Options

Results per page
Sort
Preferred Languages
Advance

Results 1 - 10 of 31 for 1xui16 (0.2 sec)

  1. tensorflow/compiler/mlir/quantization/stablehlo/tests/bridge/convert-tf-quant-types.mlir

    }
    
    // -----
    
    // CHECK-LABEL: func @id_quint8(%arg0: tensor<1xui8>) -> tensor<1xui8> {
    func.func @id_quint8(%arg0: tensor<1x!tf_type.quint8>) -> tensor<1x!tf_type.quint8> {
      // CHECK-NEXT: return %arg0 : tensor<1xui8>
      func.return %arg0: tensor<1x!tf_type.quint8>
    }
    
    // -----
    
    // CHECK-LABEL: func @id_quint16(%arg0: tensor<1xui16>) -> tensor<1xui16> {
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Mon Oct 30 06:52:55 UTC 2023
    - 25.9K bytes
    - Viewed (0)
  2. tensorflow/compiler/mlir/tensorflow/tests/graphdef2mlir/shape-attrs.pbtxt

    # CHECK-DAG: tf.IteratorGetNextSync{{.+}}-> (tensor<*xi16>, tensor<3x24xi32>, tensor<?x4x32xi64>)
    # CHECK-DAG: tf.MultiDeviceIteratorGetNextFromShard{{.+}}-> (tensor<5x40xf16>, tensor<*xcomplex<f32>>, tensor<6x48x?xcomplex<f64>>)
    # CHECK-DAG: tf.InfeedDequeueTuple{{.+}}-> (tensor<?x?x?xui16>, tensor<*xui32>, tensor<7x56xui64>)
    # CHECK-DAG: tf.InfeedDequeue{{.+}}-> tensor<?x8x?xi8>
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Fri Dec 04 18:02:53 UTC 2020
    - 5K bytes
    - Viewed (0)
  3. tensorflow/compiler/mlir/lite/tests/legalize-tf.mlir

    }
    
    func.func @addV2I16(%arg0: tensor<1xi16>, %arg1: tensor<1xi16>) -> tensor<1xi16> {
      %0 = "tf.AddV2"(%arg0, %arg1) : (tensor<1xi16>, tensor<1xi16>) -> tensor<1xi16>
      func.return %0 : tensor<1xi16>
    
    // CHECK-LABEL: addV2I16
    // CHECK:  tfl.add %arg0, %arg1 {fused_activation_function = "NONE"} : tensor<1xi16>
    }
    
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Wed Jun 05 01:54:33 UTC 2024
    - 153.4K bytes
    - Viewed (0)
  4. test/rotate.go

    )
    
    var (
    	i8 int8 = 0x12
    	i16 int16 = 0x1234
    	i32 int32 = 0x12345678
    	i64 int64 = 0x123456789abcdef0
    	ui8 uint8 = 0x12
    	ui16 uint16 = 0x1234
    	ui32 uint32 = 0x12345678
    	ui64 uint64 = 0x123456789abcdef0
    
    	ni8 = ^i8
    	ni16 = ^i16
    	ni32 = ^i32
    	ni64 = ^i64
    	nui8 = ^ui8
    	nui16 = ^ui16
    	nui32 = ^ui32
    	nui64 = ^ui64
    )
    
    var nfail = 0
    
    func main() {
    	if nfail > 0 {
    		fmt.Printf("BUG\n")
    	}
    }
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon May 02 13:43:18 UTC 2016
    - 3.3K bytes
    - Viewed (0)
  5. tensorflow/compiler/mlir/tfrt/tests/tf_to_corert/const_tensor.mlir

      %0 = "tf.Const"() {value = dense<[1, 2, 3, 4]> : tensor<4xui64>} : () -> tensor<4xui64>
      // CHECK: tfrt_fallback_async.const_dense_tensor  dense<1.000000e+00> : tensor<1xbf16>
      %1 = "tf.Const"() {device = "/device:CPU:0", value = dense<[1.0]> : tensor<1xbf16>} : () -> tensor<4xbf16>
      // CHECK: corert.executeop({{.*}}) "tf.Const"() {dtype = ui64, value = dense<[1, 2, 3, 4]> : tensor<4xui64>} : 1
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Tue May 14 00:40:32 UTC 2024
    - 2.2K bytes
    - Viewed (0)
  6. tensorflow/compiler/mlir/lite/tests/legalize-tf-assert.mlir

    func.func @preserve_assert(%arg0: tensor<1xi32>, %arg1: tensor<1xi32>) -> tensor<1xi1> {
      %0 = "tf.LessEqual"(%arg0, %arg1) : (tensor<1xi32>, tensor<1xi32>) -> tensor<1xi1>
      "tf.Assert"(%0, %arg1) {summarize = 3} : (tensor<1xi1>, tensor<1xi32>) -> ()
      func.return %0 : tensor<1xi1>
      // CHECK-LABEL: preserve_assert
      // CHECK: tfl.less_equal
      // CHECK: Assert
      // CHECK: return
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Mon Mar 28 14:24:59 UTC 2022
    - 481 bytes
    - Viewed (0)
  7. tensorflow/compiler/mlir/lite/tests/flatbuffer2mlir/constants.mlir

      func.return %0 : tensor<4xi8>
    }
    
    func.func @i16() -> tensor<4xi16> {
      // CHECK-LABEL: @i16
      // CHECK: value = dense<[1, 2, 3, 258]> : tensor<4xi16>
      %0 = "tfl.pseudo_const" () { value = dense<[1, 2, 3, 258]> : tensor<4xi16> } : () -> tensor<4xi16>
      func.return %0 : tensor<4xi16>
    }
    
    func.func @i32() -> tensor<4xi32> {
      // CHECK-LABEL: @i32
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu May 02 09:41:17 UTC 2024
    - 12.1K bytes
    - Viewed (0)
  8. tensorflow/compiler/mlir/lite/tests/flatbuffer2mlir/constants_offset.mlir

      func.return %0 : tensor<4xi8>
    }
    
    func.func @i16() -> tensor<4xi16> {
      // CHECK-LABEL: @i16
      // CHECK: value = dense<[1, 2, 3, 258]> : tensor<4xi16>
      %0 = "tfl.pseudo_const" () { value = dense<[1, 2, 3, 258]> : tensor<4xi16> } : () -> tensor<4xi16>
      func.return %0 : tensor<4xi16>
    }
    
    func.func @i32() -> tensor<4xi32> {
      // CHECK-LABEL: @i32
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu May 02 09:41:17 UTC 2024
    - 12.1K bytes
    - Viewed (0)
  9. tensorflow/compiler/mlir/lite/tests/pin-ops-with-side-effects.mlir

      func.return
    }
    
    // CHECK-LABEL: @tf_if_gets_control_node
    func.func @tf_if_gets_control_node(%arg0: tensor<1xi1>)->() {
     "tf.If"(%arg0) {_lower_using_switch_merge = true, _read_only_resource_inputs = [], device = "", else_branch = @noop, is_stateless = false, output_shapes = [#tf_type.shape<>], then_branch = @noop} : (tensor<1xi1>) -> ()
     func.return
    }
    // CHECK-NEXT: %[[CONTROL:.*]] = tfl.control_node controls "tf.If"
    // CHECK-NEXT: return
    
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Wed Aug 17 10:45:19 UTC 2022
    - 5.6K bytes
    - Viewed (0)
  10. src/cmd/vendor/golang.org/x/arch/arm/armasm/tables.go

    	VCVT_GE_FXU16_F32: "VCVT.GE.FXU16.F32",
    	VCVT_LT_FXU16_F32: "VCVT.LT.FXU16.F32",
    	VCVT_GT_FXU16_F32: "VCVT.GT.FXU16.F32",
    	VCVT_LE_FXU16_F32: "VCVT.LE.FXU16.F32",
    	VCVT_FXU16_F32:    "VCVT.FXU16.F32",
    	VCVT_ZZ_FXU16_F32: "VCVT.ZZ.FXU16.F32",
    	VCVT_EQ_FXU16_F64: "VCVT.EQ.FXU16.F64",
    	VCVT_NE_FXU16_F64: "VCVT.NE.FXU16.F64",
    	VCVT_CS_FXU16_F64: "VCVT.CS.FXU16.F64",
    	VCVT_CC_FXU16_F64: "VCVT.CC.FXU16.F64",
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed Aug 16 17:57:48 UTC 2017
    - 267.4K bytes
    - Viewed (0)
Back to top