Search Options

Results per page
Sort
Preferred Languages
Advance

Results 1 - 4 of 4 for 1x64x112x112xf32 (0.25 sec)

  1. tensorflow/compiler/mlir/lite/stablehlo/tests/optimize_layout.mlir

    // CHECK:               : (tensor<1x114x114x64xf32>) -> tensor<1x64x114x114xf32>
    // CHECK:           return %[[TPOS]] : tensor<1x64x114x114xf32>
    
    func.func @commute_transpose_pad(
          %arg0: tensor<1x112x112x64xf32>, %padding_val: tensor<f32>)
          -> tensor<1x64x114x114xf32> {
      %tspos = stablehlo.transpose %arg0, dims = [0, 3, 1, 2]
          : (tensor<1x112x112x64xf32>) -> tensor<1x64x112x112xf32>
      %ret = stablehlo.pad %tspos, %padding_val,
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu Apr 25 21:59:06 UTC 2024
    - 2.8K bytes
    - Viewed (0)
  2. tensorflow/compiler/mlir/tensorflow/tests/layout_optimization_move_transposes_end.mlir

      // CHECK: %[[RES_TRANSPOSE:[0-9]*]] = "tf.Transpose"(%[[MAX_POOL]], %[[RES_PERM]])
      // CHECK: return %[[RES_TRANSPOSE]]
    
      // Transpose NCHW -> NHWC
      %0 = "tf.Const"() {value = dense<[0, 2, 3, 1]> : tensor<4xi32>} : () -> tensor<4xi32>
      %1 = "tf.Transpose"(%arg0, %0) : (tensor<1x64x112x112xf32>, tensor<4xi32>) -> tensor<1x112x112x64xf32>
    
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Mon Oct 30 06:52:55 UTC 2023
    - 9.5K bytes
    - Viewed (0)
  3. tensorflow/compiler/mlir/tensorflow/tests/layout_optimization_layout_assignment_to_nhwc.mlir

      func.return %0 : tensor<1x256x150x150xf32>
    }
    
    // CHECK-LABEL: maxpool_nchw
    func.func @maxpool_nchw(%arg0: tensor<1x64x112x112xf32>) -> tensor<1x64x56x56xf32> {
      // CHECK: %[[CST:.*]] = "tf.Const"() <{value = dense<[0, 2, 3, 1]> : tensor<4xi64>}>
      // CHECK: %[[R0:.*]] = "tf.Transpose"(%arg0, %[[CST]])
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Mon Oct 30 06:52:55 UTC 2023
    - 4.5K bytes
    - Viewed (0)
  4. tensorflow/compiler/mlir/tensorflow/tests/layout_optimization_to_nhwc.mlir

             is_training = false
           } : (tensor<?x64x112x112xf32>, tensor<64xf32>, tensor<64xf32>, tensor<64xf32>, tensor<64xf32>)
            -> (tensor<?x64x112x112xf32>, tensor<64xf32>, tensor<64xf32>, tensor<64xf32>, tensor<64xf32>, tensor<*xf32>)
    
      // CHECK: "tf.FusedBatchNormV3"
      // CHECK-SAME: data_format = "NHWC"
    
      %7 = "tf.Relu"(%6) : (tensor<?x64x112x112xf32>) -> tensor<?x64x112x112xf32>
      %8 = "tf.MaxPool"(%7)
           {
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Mon Oct 30 06:52:55 UTC 2023
    - 7.3K bytes
    - Viewed (0)
Back to top