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src/cmd/asm/internal/asm/testdata/riscv64.s
// 20.5: Single-Precision Load and Store Instructions FLW (X5), F0 // 07a00200 FLW 4(X5), F0 // 07a04200 FSW F0, (X5) // 27a00200 FSW F0, 4(X5) // 27a20200 // 20.6: Single-Precision Floating-Point Computational Instructions FADDS F1, F0, F2 // 53011000 FSUBS F1, F0, F2 // 53011008 FMULS F1, F0, F2 // 53011010 FDIVS F1, F0, F2 // 53011018
Created: Tue Apr 07 11:13:11 GMT 2026 - Last Modified: Sat Apr 04 05:25:40 GMT 2026 - 74.2K bytes - Click Count (0)