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  2. github.com/golang/go

    src/cmd/asm/internal/asm/testdata/riscv64.s 

    	// 8.1: Base Counters and Timers (Zicntr)
	RDCYCLE		X5				// f32200c0
	RDTIME		X5				// f32210c0
	RDINSTRET	X5				// f32220c0

	// 10.1: Zihintpause Extension for Pause Hint
	PAUSE						// 0f000001

	// 12.3: Integer Conditional Operations (Zicond)
	CZEROEQZ	X5, X6, X7			// b353530e
	CZEROEQZ	X5, X7				// b3d3530e
	CZERONEZ	X5, X6, X7			// b373530e
	CZERONEZ	X5, X7				// b3f3530e
    Created: Tue Apr 07 11:13:11 GMT 2026
    - Last Modified: Sat Apr 04 05:25:40 GMT 2026
    - 74.2K bytes
    - Click Count (0)
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