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  2. github.com/golang/go

    src/cmd/asm/internal/asm/testdata/riscv64validation.s 

    	VZEXTVF2	V2, V0, V3, V4			// ERROR "expected no register in rs3"
	VZEXTVF2	X10, V3				// ERROR "expected vector register in vs2 position"
	VSEXTVF2	V2, V0, V3, V4			// ERROR "expected no register in rs3"
	VSEXTVF2	X10, V3				// ERROR "expected vector register in vs2 position"
	VZEXTVF4	V2, V0, V3, V4			// ERROR "expected no register in rs3"
	VZEXTVF4	X10, V3				// ERROR "expected vector register in vs2 position"
    Registered: Tue Sep 09 11:13:09 UTC 2025
    - Last Modified: Wed May 21 14:19:19 UTC 2025
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