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Results 1 - 6 of 6 for cmovz (0.13 sec)
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src/cmd/compile/internal/ssa/_gen/AMD64.rules
=> (CMOVWNE y x (CMPQconst [0] check)) // Absorb InvertFlags (CMOVQ(EQ|NE|LT|GT|LE|GE|HI|CS|CC|LS) x y (InvertFlags cond)) => (CMOVQ(EQ|NE|GT|LT|GE|LE|CS|HI|LS|CC) x y cond) (CMOVL(EQ|NE|LT|GT|LE|GE|HI|CS|CC|LS) x y (InvertFlags cond)) => (CMOVL(EQ|NE|GT|LT|GE|LE|CS|HI|LS|CC) x y cond) (CMOVW(EQ|NE|LT|GT|LE|GE|HI|CS|CC|LS) x y (InvertFlags cond)) => (CMOVW(EQ|NE|GT|LT|GE|LE|CS|HI|LS|CC) x y cond)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Mar 12 19:38:41 UTC 2024 - 93.9K bytes - Viewed (0) -
src/cmd/internal/obj/arm64/asm7.go
rel.Off = int32(c.pc) rel.Siz = 8 rel.Sym = p.From.Sym rel.Add = p.From.Offset rel.Type = objabi.R_ADDRARM64 case 69: /* LE model movd $tlsvar, reg -> movz reg, 0 + reloc */ o1 = c.opirr(p, AMOVZ) o1 |= uint32(p.To.Reg & 31) rel := obj.Addrel(c.cursym) rel.Off = int32(c.pc) rel.Siz = 4 rel.Sym = p.From.Sym rel.Type = objabi.R_ARM64_TLS_LE
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 15 15:44:14 UTC 2024 - 201.1K bytes - Viewed (0) -
src/cmd/internal/obj/mips/asm0.go
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Apr 16 17:46:09 UTC 2024 - 53.6K bytes - Viewed (0) -
src/cmd/link/internal/arm64/asm.go
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Jan 30 20:09:45 UTC 2024 - 47K bytes - Viewed (0) -
src/crypto/internal/nistec/p256_asm_amd64.s
XORQ AX, AX MOVQ $1, t1 // Check whether [acc4..acc7] are all zero. MOVQ acc4, t0 ORQ acc5, t0 ORQ acc6, t0 ORQ acc7, t0 // Set the zero flag if so. (CMOV of a constant to a register doesn't // appear to be supported in Go. Thus t1 = 1.) CMOVQEQ t1, AX // XOR [acc4..acc7] with P and compare with zero again. XORQ $-1, acc4 XORQ p256const0<>(SB), acc5
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Mar 04 17:29:44 UTC 2024 - 39.8K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/opGen.go
{0, 335544318}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19 R20 R21 R22 R24 R25 R28 R31 }, }, }, { name: "CMOVZ", argLen: 3, resultInArg0: true, asm: mips.ACMOVZ, reg: regInfo{ inputs: []inputInfo{ {0, 335544318}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19 R20 R21 R22 R24 R25 R28 R31
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 23 15:49:20 UTC 2024 - 1M bytes - Viewed (0)