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Results 1 - 9 of 9 for cmovnl (0.17 sec)
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src/cmd/internal/obj/mips/asm0.go
return SP(7, 1) case AMOVD: return SP(7, 5) case AMOVWL: return SP(5, 2) case AMOVWR: return SP(5, 6) case AMOVVL: return SP(5, 4) case AMOVVR: return SP(5, 5) case ABREAK: return SP(5, 7) case -AMOVWL: return SP(4, 2) case -AMOVWR: return SP(4, 6) case -AMOVVL: return SP(3, 2) case -AMOVVR: return SP(3, 3)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Apr 16 17:46:09 UTC 2024 - 53.6K bytes - Viewed (0) -
src/cmd/internal/obj/loong64/a.out.go
ALL ALLV ALUI AMOVB AMOVBU AMOVD AMOVDF AMOVDW AMOVF AMOVFD AMOVFW AMOVH AMOVHU AMOVW AMOVWD AMOVWF AMOVWL AMOVWR AMUL AMULD AMULF AMULU AMULH AMULHU AMULW ANEGD ANEGF ANEGW ANEGV ANOOP // hardware nop ANOR AOR AREM AREMU
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 22 02:04:54 UTC 2024 - 5.7K bytes - Viewed (0) -
src/cmd/internal/obj/loong64/asm.go
case AMOVF: return 0x0ad << 22 case AMOVD: return 0x0af << 22 case AMOVWL: return 0x0bc << 22 case AMOVWR: return 0x0bd << 22 case AMOVVL: return 0x0be << 22 case AMOVVR: return 0x0bf << 22 case -AMOVWL: return 0x0b8 << 22 case -AMOVWR: return 0x0b9 << 22 case -AMOVVL: return 0x0ba << 22 case -AMOVVR: return 0x0bb << 22 case -AMOVB:
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 22 02:04:54 UTC 2024 - 61.8K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/AMD64.rules
(CMOVL(EQ|NE|LT|GT|LE|GE|HI|CS|CC|LS) x y (InvertFlags cond)) => (CMOVL(EQ|NE|GT|LT|GE|LE|CS|HI|LS|CC) x y cond) (CMOVW(EQ|NE|LT|GT|LE|GE|HI|CS|CC|LS) x y (InvertFlags cond)) => (CMOVW(EQ|NE|GT|LT|GE|LE|CS|HI|LS|CC) x y cond) // Absorb constants generated during lower (CMOV(QEQ|QLE|QGE|QCC|QLS|LEQ|LLE|LGE|LCC|LLS|WEQ|WLE|WGE|WCC|WLS) _ x (FlagEQ)) => x
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Mar 12 19:38:41 UTC 2024 - 93.9K bytes - Viewed (0) -
test/codegen/mathbits.go
func IterateBits(n uint) int { i := 0 for n != 0 { // amd64/v1,amd64/v2:"BSFQ",-"CMOVEQ" // amd64/v3:"TZCNTQ" i += bits.TrailingZeros(n) n &= n - 1 } return i } func IterateBits64(n uint64) int { i := 0 for n != 0 { // amd64/v1,amd64/v2:"BSFQ",-"CMOVEQ" // amd64/v3:"TZCNTQ" i += bits.TrailingZeros64(n) n &= n - 1 } return i }
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 23 18:51:17 UTC 2024 - 19.6K bytes - Viewed (0) -
src/cmd/internal/obj/ppc64/a.out.go
AMOVMW ALBAR ALHAR ALSW ALWAR ALWSYNC AMOVDBR AMOVWBR AMOVB AMOVBU AMOVBZ AMOVBZU AMOVH AMOVHBR AMOVHU AMOVHZ AMOVHZU AMOVW AMOVWU AMOVFL AMOVCRFS AMTFSB0 AMTFSB0CC AMTFSB1 AMTFSB1CC AMULHW AMULHWCC AMULHWU AMULHWUCC AMULLW AMULLWCC AMULLWVCC AMULLWV ANAND ANANDCC ANEG ANEGCC
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Apr 01 18:50:29 UTC 2024 - 16K bytes - Viewed (0) -
src/cmd/internal/obj/ppc64/asm9.go
{as: AFMOVSZ, a1: C_XOREG, a6: C_FREG, type_: 45, size: 4}, {as: AMOVFL, a1: C_CREG, a6: C_CREG, type_: 67, size: 4}, {as: AMOVFL, a1: C_FPSCR, a6: C_CREG, type_: 73, size: 4}, {as: AMOVFL, a1: C_FPSCR, a6: C_FREG, type_: 53, size: 4}, {as: AMOVFL, a1: C_FREG, a3: C_32CON, a6: C_FPSCR, type_: 64, size: 4}, {as: AMOVFL, a1: C_FREG, a6: C_FPSCR, type_: 64, size: 4}, {as: AMOVFL, a1: C_32CON, a6: C_FPSCR, type_: 65, size: 4},
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 15 13:55:28 UTC 2024 - 156.1K bytes - Viewed (0) -
src/cmd/internal/obj/arm64/asm7.go
case ATST: oprangeset(ATSTW, t) /* register/register, and shifted */ case AMVN: oprangeset(AMVNW, t) case AMOVK: oprangeset(AMOVKW, t) oprangeset(AMOVN, t) oprangeset(AMOVNW, t) oprangeset(AMOVZ, t) oprangeset(AMOVZW, t) case ASWPD: for i := range atomicLDADD { oprangeset(i, t) } for i := range atomicSWP { if i == ASWPD {
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 15 15:44:14 UTC 2024 - 201.1K bytes - Viewed (0) -
src/cmd/internal/obj/x86/asm6.go
{AMOVW, Yml, Ynone, Ygs, movMemReg, [4]uint8{0x8e, 5, 0, 0}}, // mov cr {AMOVL, Ycr0, Ynone, Yrl, movRegMem2op, [4]uint8{0x0f, 0x20, 0, 0}}, {AMOVL, Ycr2, Ynone, Yrl, movRegMem2op, [4]uint8{0x0f, 0x20, 2, 0}}, {AMOVL, Ycr3, Ynone, Yrl, movRegMem2op, [4]uint8{0x0f, 0x20, 3, 0}}, {AMOVL, Ycr4, Ynone, Yrl, movRegMem2op, [4]uint8{0x0f, 0x20, 4, 0}}, {AMOVL, Ycr8, Ynone, Yrl, movRegMem2op, [4]uint8{0x0f, 0x20, 8, 0}},
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 15 15:44:14 UTC 2024 - 146.9K bytes - Viewed (0)