// github.com/DangerOnTheRanger/cel-benchmark performed on 16-core Intel Xeon
		// the lowest bucket was based around the 180ns/op figure for BenchmarkAccess,
		// plus some additional leeway to account for the apiserver doing other things
		// the largest bucket was chosen based on the fact that benchmarks indicate the
		// same Xeon running a CEL expression close to the estimated cost limit takes

// 4 workers. This was measured on the following machines.
//
// * MacBookPro with a 4-core Intel Core i7 CPU
// * Linux workstation with 6-core Intel Xeon CPU
// * Linux workstation with 24-core Intel Xeon CPU
//
// It is very likely (though not confirmed) that this workload is limited
// by memory bandwidth. We don't have a good way to determine the number of

Articles: English: - author: Stephen Siegert - Neon link: https://neon.tech/blog/deploy-a-serverless-fastapi-app-with-neon-postgres-and-aws-app-runner-at-any-scale title: Deploy a Serverless FastAPI App with Neon Postgres and AWS App Runner at any scale - author: Kurtis Pykes - NVIDIA link: https://developer.nvidia.com/blog/building-a-machine-learning-microservice-with-fastapi/ title: Building a Machine Learning Microservice with FastAPI - author: Ravgeet Dhillon - Twilio link: https://www.tw...

	return a, b
}

// Check generation of arm64 BIC/EON/ORN instructions

func op_bic(x, y uint32) uint32 {
	// arm64:`BIC\t`,-`AND`
	return x &^ y
}

func op_eon(x, y, z uint32, a []uint32, n, m uint64) uint64 {
	// arm64:`EON\t`,-`EOR`,-`MVN`
	a[0] = x ^ (y ^ 0xffffffff)

	// arm64:`EON\t`,-`EOR`,-`MVN`
	a[1] = ^(y ^ z)

	// arm64:`EON\t`,-`XOR`
	a[2] = x ^ ^z

	// arm64: "MVN\tR[0-9]+@>51, R[0-9]+"
	a[10] = ^bits.RotateLeft64(a[9], 13)
	// arm64: "BIC\tR[0-9]+@>51, R[0-9]+, R[0-9]+"
	a[13] = a[12] &^ bits.RotateLeft64(a[11], 13)
	// arm64: "EON\tR[0-9]+@>51, R[0-9]+, R[0-9]+"
	a[16] = a[15] ^ ^bits.RotateLeft64(a[14], 13)
	// arm64: "ORN\tR[0-9]+@>51, R[0-9]+, R[0-9]+"
	a[19] = a[18] | ^bits.RotateLeft64(a[17], 13)
	// arm64: "TST\tR[0-9]+@>51, R[0-9]+"

		{name: "EONshiftLL", argLength: 2, reg: gp21, asm: "EON", aux: "Int64"},                   // arg0 ^ ^(arg1<<auxInt), auxInt should be in the range 0 to 63.
		{name: "EONshiftRL", argLength: 2, reg: gp21, asm: "EON", aux: "Int64"},                   // arg0 ^ ^(arg1>>auxInt), unsigned shift, auxInt should be in the range 0 to 63.

	HasIWMMXT   bool // Intel Wireless MMX technology support
	HasCRUNCH   bool // MaverickCrunch context switching and handling
	HasTHUMBEE  bool // Thumb EE instruction set
	HasNEON     bool // NEON instruction set
	HasVFPv3    bool // Vector floating point version 3 support
	HasVFPv3D16 bool // Vector floating point version 3 D8-D15
	HasTLS      bool // Thread local storage support

<div style="text-align: right; margin-right: 10%;">Deon Pillsbury - <strong>Cisco</strong> <a href="https://www.linkedin.com/posts/deonpillsbury_cisco-cx-python-activity-6963242628536487936-trAp/" target="_blank"><small>(Ref)</small></a></div>

---

(ORN x0 x1:(RORconst [c] y)) && clobberIfDead(x1) => (ORNshiftRO x0 y [c])
(EON x0 x1:(SLLconst [c] y)) && clobberIfDead(x1) => (EONshiftLL x0 y [c])
(EON x0 x1:(SRLconst [c] y)) && clobberIfDead(x1) => (EONshiftRL x0 y [c])
(EON x0 x1:(SRAconst [c] y)) && clobberIfDead(x1) => (EONshiftRA x0 y [c])
(EON x0 x1:(RORconst [c] y)) && clobberIfDead(x1) => (EONshiftRO x0 y [c])

<div style="text-align: right; margin-right: 10%;">Deon Pillsbury - <strong>Cisco</strong> <a href="https://www.linkedin.com/posts/deonpillsbury_cisco-cx-python-activity-6963242628536487936-trAp/" target="_blank"><small>(ref)</small></a></div>

---