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Results 1 - 3 of 3 for RDTSCP (0.19 sec)

  1. src/internal/cpu/cpu_x86.go

    func doinit() {
    	options = []option{
    		{Name: "adx", Feature: &X86.HasADX},
    		{Name: "aes", Feature: &X86.HasAES},
    		{Name: "erms", Feature: &X86.HasERMS},
    		{Name: "pclmulqdq", Feature: &X86.HasPCLMULQDQ},
    		{Name: "rdtscp", Feature: &X86.HasRDTSCP},
    		{Name: "sha", Feature: &X86.HasSHA},
    	}
    	level := getGOAMD64level()
    	if level < 2 {
    		// These options are required at level 2. At lower levels
    		// they can be turned off.
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 22 13:40:20 UTC 2024
    - 5.8K bytes
    - Viewed (0)
  2. src/runtime/asm_386.s

    	JMP	rdtsc  // no fence instructions available
    #endif
    	CMPB	internal∕cpu·X86+const_offsetX86HasRDTSCP(SB), $1
    	JNE	fences
    	// Instruction stream serializing RDTSCP is supported.
    	// RDTSCP is supported by Intel Nehalem (2008) and
    	// AMD K8 Rev. F (2006) and newer.
    	RDTSCP
    done:
    	MOVL	AX, ret_lo+0(FP)
    	MOVL	DX, ret_hi+4(FP)
    	RET
    fences:
    	// MFENCE is instruction stream serializing and flushes the
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Mar 15 15:45:13 UTC 2024
    - 43.1K bytes
    - Viewed (0)
  3. src/runtime/asm_amd64.s

    TEXT runtime·cputicks(SB),NOSPLIT,$0-0
    	CMPB	internal∕cpu·X86+const_offsetX86HasRDTSCP(SB), $1
    	JNE	fences
    	// Instruction stream serializing RDTSCP is supported.
    	// RDTSCP is supported by Intel Nehalem (2008) and
    	// AMD K8 Rev. F (2006) and newer.
    	RDTSCP
    done:
    	SHLQ	$32, DX
    	ADDQ	DX, AX
    	MOVQ	AX, ret+0(FP)
    	RET
    fences:
    	// MFENCE is instruction stream serializing and flushes the
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Sat May 11 20:38:24 UTC 2024
    - 60.4K bytes
    - Viewed (0)
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