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Results 1 - 10 of 11 for MOVD (0.04 seconds)
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lib/fips140/v1.26.0.zip
xk *uint32, dst, src *byte) TEXT è·¯encryptBlockAsm(SB), NOSPLIT|NOFRAME, $0 MOVD nr+0(FP), R6 // Round count/Key size MOVD xk+8(FP), R5 // Key pointer MOVD dst+16(FP), R3 // Dest pointer MOVD src+24(FP), R4 // Src pointer SETUP_ESPERM(R7) // Set CR{1,2,3}EQ to hold the key size information. CMPU R6, $10, CR1 CMPU R6, $12, CR2 CMPU R6, $14, CR3 MOVD $16, R6 MOVD $32, R7 MOVD $48, R8 MOVD $64, R9 MOVD $80, R10 MOVD $96, R11 MOVD $112, R12 // Load text in BE order P8_LXVB16X(R4, R0, V0) // V1, V2 will...
Created: Tue Apr 07 11:13:11 GMT 2026 - Last Modified: Thu Jan 08 17:58:32 GMT 2026 - 660.3K bytes - Click Count (0) -
src/cmd/asm/internal/asm/testdata/loong64enc3.s
MOVF y+65540(FP), F4 // 1e020014de8f1000c433002b MOVD y+65540(FP), F4 // 1e020014de8f1000c433802b MOVF y+4097(FP), F4 // 3e000014de8f1000c427002b MOVD y+4097(FP), F4 // 3e000014de8f1000c427802b MOVF 65536(R5), F4 // 1e020014de971000c403002b MOVD 65536(R5), F4 // 1e020014de971000c403802b MOVF 4096(R5), F4 // 3e000014de971000c403002b MOVD 4096(R5), F4 // 3e000014de971000c403802b
Created: Tue Apr 07 11:13:11 GMT 2026 - Last Modified: Thu Nov 27 00:46:52 GMT 2025 - 11.2K bytes - Click Count (0) -
src/cmd/asm/internal/asm/testdata/arm64.s
MOVD $0x11110000, R1 // MOVD $286326784, R1 // 2122a2d2 MOVD $0xaaaa0000aaaa1111, R1 // MOVD $-6149102338357718767, R1 // 212282d24155b5f24155f5f2 MOVD $0x1111ffff1111aaaa, R1 // MOVD $1230045644216969898, R1 // a1aa8a922122a2f22122e2f2 MOVD $0xaaaaaaaaaaaaaaab, R1 // MOVD $-6148914691236517205, R1 // e1f301b2615595f2
Created: Tue Apr 07 11:13:11 GMT 2026 - Last Modified: Fri Feb 27 20:41:17 GMT 2026 - 96.2K bytes - Click Count (0) -
src/cmd/asm/internal/asm/testdata/arm64enc.s
Created: Tue Apr 07 11:13:11 GMT 2026 - Last Modified: Tue Feb 24 21:29:25 GMT 2026 - 44K bytes - Click Count (0) -
src/cmd/asm/internal/asm/testdata/loong64enc2.s
MOVBU R4, name(SB) // 1e00001ac4030029 MOVF F4, name(SB) // 1e00001ac403402b MOVD F4, name(SB) // 1e00001ac403c02b MOVW name(SB), R4 // 1e00001ac4038028 MOVWU name(SB), R4 // 1e00001ac403802a MOVV name(SB), R4 // 1e00001ac403c028 MOVB name(SB), R4 // 1e00001ac4030028 MOVBU name(SB), R4 // 1e00001ac403002a MOVF name(SB), F4 // 1e00001ac403002b MOVD name(SB), F4 // 1e00001ac403802b MOVH R4, name(SB) // 1e00001ac4034029
Created: Tue Apr 07 11:13:11 GMT 2026 - Last Modified: Thu Nov 27 00:46:52 GMT 2025 - 5.6K bytes - Click Count (0) -
src/cmd/asm/internal/asm/testdata/loong64enc1.s
BNE R0, R4, 1(PC) // 80040044 BLTU R4, 1(PC) // 80040068 MOVF y+8(FP), F4 // 6440002b MOVD y+8(FP), F4 // 6440802b MOVF 1(F5), F4 // a404002b MOVD 1(F5), F4 // a404802b MOVF F4, result+16(FP) // 6460402b MOVD F4, result+16(FP) // 6460c02b MOVF F4, 1(F5) // a404402b MOVD F4, 1(F5) // a404c02b MOVW R4, F5 // 85a41401 MOVW F4, R5 // 85b41401 MOVV R4, F5 // 85a81401
Created: Tue Apr 07 11:13:11 GMT 2026 - Last Modified: Thu Nov 27 00:46:52 GMT 2025 - 44.5K bytes - Click Count (0) -
src/cmd/asm/internal/asm/testdata/riscv64.s
MOVF $(709.78271289338397), F3 // 970f000087a10f00 MOVD 4(X5), F0 // 07b04200 MOVD F0, 4(X5) // 27b20200 MOVD F0, F1 // d3000022 MOVD F3, X1 // d38001e2 MOVD X1, F3 // d38100f2 MOVD X0, F3 // d30100f2 MOVD $(0.0), F3 // d30100f2 // Converted to load of symbol (AUIPC + FLD) MOVD $(709.78271289338397), F3 // 970f000087b10f00
Created: Tue Apr 07 11:13:11 GMT 2026 - Last Modified: Sat Apr 04 05:25:40 GMT 2026 - 74.2K bytes - Click Count (0) -
src/cmd/asm/internal/asm/testdata/arm64error.s
Created: Tue Apr 07 11:13:11 GMT 2026 - Last Modified: Tue Feb 24 21:29:25 GMT 2026 - 38.5K bytes - Click Count (0) -
src/cmd/asm/internal/arch/arch.go
instructions["JPS"] = x86.AJPS /* parity set (PF = 1) */ instructions["JS"] = x86.AJMI /* alternate */ instructions["JZ"] = x86.AJEQ /* alternate */ instructions["MASKMOVDQU"] = x86.AMASKMOVOU instructions["MOVD"] = x86.AMOVQ instructions["MOVDQ2Q"] = x86.AMOVQ instructions["MOVNTDQ"] = x86.AMOVNTO instructions["MOVOA"] = x86.AMOVO instructions["PSLLDQ"] = x86.APSLLO instructions["PSRLDQ"] = x86.APSRLO
Created: Tue Apr 07 11:13:11 GMT 2026 - Last Modified: Fri Mar 20 17:02:17 GMT 2026 - 22K bytes - Click Count (0) -
doc/asm.html
</p> <p> It is currently supported on arm64, amd64, ppc64, loong64 and riscv64. For example, the start of the <code>MOVD</code> instruction below is aligned to 32 bytes: <pre> PCALIGN $32 MOVD $2, R0 </pre> </p> <h3 id="data-offsets">Interacting with Go types and constants</h3> <p> If a package has any .s files, then <code>go build</code> will direct
Created: Tue Apr 07 11:13:11 GMT 2026 - Last Modified: Fri Nov 14 19:09:46 GMT 2025 - 36.5K bytes - Click Count (0)