- Sort Score
- Result 10 results
- Languages All
Results 1 - 10 of 10 for Less64U$ (0.17 sec)
-
src/cmd/compile/internal/ssa/_gen/RISCV64.rules
(Less64 ...) => (SLT ...) (Less32 x y) => (SLT (SignExt32to64 x) (SignExt32to64 y)) (Less16 x y) => (SLT (SignExt16to64 x) (SignExt16to64 y)) (Less8 x y) => (SLT (SignExt8to64 x) (SignExt8to64 y)) (Less64U ...) => (SLTU ...) (Less32U x y) => (SLTU (ZeroExt32to64 x) (ZeroExt32to64 y)) (Less16U x y) => (SLTU (ZeroExt16to64 x) (ZeroExt16to64 y)) (Less8U x y) => (SLTU (ZeroExt8to64 x) (ZeroExt8to64 y))
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Mar 07 14:57:07 UTC 2024 - 40.3K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/rewritegeneric.go
v2.AuxInt = int8ToAuxInt(d - c) v.AddArg2(v0, v2) return true } break } // match: (AndB (Less64U (Const64 [c]) x) (Less64U x (Const64 [d]))) // cond: uint64(d) >= uint64(c+1) && uint64(c+1) > uint64(c) // result: (Less64U (Sub64 <x.Type> x (Const64 <x.Type> [c+1])) (Const64 <x.Type> [d-c-1])) for { for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Apr 22 18:24:47 UTC 2024 - 812.2K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/generic.rules
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 16 22:21:05 UTC 2024 - 135.3K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/genericOps.go
{name: "Less16U", argLength: 2, typ: "Bool"}, {name: "Less32", argLength: 2, typ: "Bool"}, {name: "Less32U", argLength: 2, typ: "Bool"}, {name: "Less64", argLength: 2, typ: "Bool"}, {name: "Less64U", argLength: 2, typ: "Bool"}, {name: "Less32F", argLength: 2, typ: "Bool"}, {name: "Less64F", argLength: 2, typ: "Bool"}, {name: "Leq8", argLength: 2, typ: "Bool"}, // arg0 <= arg1, signed
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 23 15:49:20 UTC 2024 - 42.6K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/ARM64.rules
(Less8U x y) => (LessThanU (CMPW (ZeroExt8to32 x) (ZeroExt8to32 y))) (Less16U x y) => (LessThanU (CMPW (ZeroExt16to32 x) (ZeroExt16to32 y))) (Less32U x y) => (LessThanU (CMPW x y)) (Less64U x y) => (LessThanU (CMP x y)) (Leq8 x y) => (LessEqual (CMPW (SignExt8to32 x) (SignExt8to32 y))) (Leq16 x y) => (LessEqual (CMPW (SignExt16to32 x) (SignExt16to32 y))) (Leq32 x y) => (LessEqual (CMPW x y))
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 23 15:49:20 UTC 2024 - 113.1K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/rewriteARM64.go
b := v.Block typ := &b.Func.Config.Types // match: (Less64U zero:(MOVDconst [0]) x) // result: (Neq64 zero x) for { zero := v_0 if zero.Op != OpARM64MOVDconst || auxIntToInt64(zero.AuxInt) != 0 { break } x := v_1 v.reset(OpNeq64) v.AddArg2(zero, x) return true } // match: (Less64U x (MOVDconst [1])) // result: (Eq64 x (MOVDconst [0])) for {
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 23 15:49:20 UTC 2024 - 608.6K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/rewriteRISCV64.go
return true } } func rewriteValueRISCV64_OpLeq64U(v *Value) bool { v_1 := v.Args[1] v_0 := v.Args[0] b := v.Block typ := &b.Func.Config.Types // match: (Leq64U x y) // result: (Not (Less64U y x)) for { x := v_0 y := v_1 v.reset(OpNot) v0 := b.NewValue0(v.Pos, OpLess64U, typ.Bool) v0.AddArg2(y, x) v.AddArg(v0) return true } }
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Mar 07 14:57:07 UTC 2024 - 205.1K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/rewritePPC64.go
v0.AddArg2(x, y) v.AddArg(v0) return true } } func rewriteValuePPC64_OpLess64U(v *Value) bool { v_1 := v.Args[1] v_0 := v.Args[0] b := v.Block // match: (Less64U x y) // result: (LessThan (CMPU x y)) for { x := v_0 y := v_1 v.reset(OpPPC64LessThan) v0 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags) v0.AddArg2(x, y) v.AddArg(v0)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Jun 07 19:02:52 UTC 2024 - 360.2K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/rewriteAMD64.go
v0.AddArg2(y, x) v.AddArg(v0) return true } } func rewriteValueAMD64_OpLess64U(v *Value) bool { v_1 := v.Args[1] v_0 := v.Args[0] b := v.Block // match: (Less64U x y) // result: (SETB (CMPQ x y)) for { x := v_0 y := v_1 v.reset(OpAMD64SETB) v0 := b.NewValue0(v.Pos, OpAMD64CMPQ, types.TypeFlags) v0.AddArg2(x, y) v.AddArg(v0)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Mar 12 19:38:41 UTC 2024 - 712.7K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/opGen.go
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 23 15:49:20 UTC 2024 - 1M bytes - Viewed (0)