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  2. github.com/golang/go

    src/cmd/asm/internal/asm/testdata/riscv64.s 

    	DIVW	X5, X6, X7				// bb435302
	DIVUW	X5, X6, X7				// bb535302
	REMW	X5, X6, X7				// bb635302
	REMUW	X5, X6, X7				// bb735302

	// 14.2: Load-Reserved/Store-Conditional (Zalrsc)
	LRW	(X5), X6				// 2fa30214
	LRD	(X5), X6				// 2fb30214
	SCW	X5, (X6), X7				// af23531a
	SCD	X5, (X6), X7				// af33531a

	// 14.4: Atomic Memory Operations (Zaamo)
	AMOSWAPW	X5, (X6), X7			// af23530e
    Registered: Tue Dec 30 11:13:12 UTC 2025
    - Last Modified: Thu Nov 13 12:17:37 UTC 2025
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