Addressing modes:
</p>

<ul>

<li>
<code>R0-&gt;16</code>
<br>
<code>R0&gt;&gt;16</code>
<br>
<code>R0&lt;&lt;16</code>
<br>
<code>R0@&gt;16</code>:
For <code>&lt;&lt;</code>, left shift <code>R0</code> by 16 bits.
The other codes are <code>-&gt;</code> (arithmetic right shift),
<code>&gt;&gt;</code> (logical right shift), and
<code>@&gt;</code> (rotate right).
</li>

<li>

            <!-- everything except { and } -->

<pre class="grammar">
+    &amp;     +=    &amp;=     &amp;&amp;    ==    !=    (    )
-    |     -=    |=     ||    &lt;     &lt;=    [    ]
*    ^     *=    ^=     &lt;-    &gt;     &gt;=    {    }
/    &lt;&lt;    /=    &lt;&lt;=    ++    =     :=    ,    ;
%    &gt;&gt;    %=    &gt;&gt;=    --    !     ...   .    :
     &amp;^          &amp;^=          ~
</pre>

<h3 id="Integer_literals">Integer literals</h3>

<p>

	VMOV	V8.B[7], V4.B[8]      // 043d116e

// CBZ
again:
	CBZ	R1, again // CBZ R1

// conditional operations
	CSET	GT, R1	        // e1d79f9a
	CSETW	HI, R2	        // e2979f1a
	CSEL	LT, R1, R2, ZR	// 3fb0829a
	CSELW	LT, R2, R3, R4	// 44b0831a
	CSINC	GT, R1, ZR, R3	// 23c49f9a
	CSNEG	MI, R1, R2, R3	// 234482da
	CSINV	CS, R1, R2, R3	// CSINV	HS, R1, R2, R3 // 232082da
	CSINV	HS, R1, R2, R3	// 232082da

encryption, no stitching GEN_VCIPHER_INPUT // Generate input value for single encryption VCIPHER_1X9_KEYS(V15) // Encrypt V15 value with 9 keys XXLOR VS10, VS10, V23 // Last key -> V23 for later vcipiherlast // Key length based on CR2. (LT=10, EQ=12, GT=14) BLT CR2, block16_last // Finish for key size 10 VCIPHER_1X2_KEYS(V15, VS10, VS11) // Encrypt V15 with 2 more keys XXLOR VS12, VS12, V23 // Last key -> V23 for later vcipherlast BEQ CR2, block16_last // Finish for key size 12 VCIPHER_1X2_KEYS(V15,...