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Results 1 - 2 of 2 for FADDD (0.06 sec)
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src/cmd/asm/internal/asm/testdata/riscv64.s
FLD (X5), F0 // 07b00200 FLD 4(X5), F0 // 07b04200 FSD F0, (X5) // 27b00200 FSD F0, 4(X5) // 27b20200 // 21.4: Double-Precision Floating-Point Computational Instructions FADDD F1, F0, F2 // 53011002 FSUBD F1, F0, F2 // 5301100a FMULD F1, F0, F2 // 53011012 FDIVD F1, F0, F2 // 5301101a FMIND F1, F0, F2 // 5301102a FMAXD F1, F0, F2 // 5311102a
Registered: Tue Nov 05 11:13:11 UTC 2024 - Last Modified: Fri Oct 25 12:05:29 UTC 2024 - 16.8K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/arm64.s
FNMADDD F1, F3, F2, F4 // 440c611f FNMSUBS F1, F3, F2, F4 // 448c211f FNMSUBD F1, F3, F2, F4 // 448c611f FADDS F2, F3, F4 // 6428221e FADDD F1, F2 // 4228611e VDUP V19.S[0], V17.S4 // 7106044e VTRN1 V3.D2, V2.D2, V20.D2 // 5428c34e VTRN2 V3.D2, V2.D2, V21.D2 // 5568c34e
Registered: Tue Nov 05 11:13:11 UTC 2024 - Last Modified: Wed Jul 24 18:45:14 UTC 2024 - 95.2K bytes - Viewed (0)