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Results 1 - 3 of 3 for BTCL (0.17 sec)

  1. test/codegen/bits.go

    	n += a &^ (1 << 31)
    
    	// amd64:"ANDL\t[$]-268435457"
    	n += a &^ (1 << 28)
    
    	// amd64:"ANDL\t[$]-2"
    	n += a &^ (1 << 0)
    
    	return n
    }
    
    func bitcompl32(a, b uint32) (n uint32) {
    	// amd64:"BTCL"
    	n += b ^ (1 << (a & 31))
    
    	// amd64:"XORL\t[$]-2147483648"
    	n += a ^ (1 << 31)
    
    	// amd64:"XORL\t[$]268435456"
    	n += a ^ (1 << 28)
    
    	// amd64:"XORL\t[$]1"
    	n += a ^ (1 << 0)
    
    	return n
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Jun 07 19:02:52 UTC 2024
    - 7.8K bytes
    - Viewed (0)
  2. src/cmd/compile/internal/ssa/rewriteAMD64.go

    		return true
    	}
    	return false
    }
    func rewriteValueAMD64_OpAMD64XORL(v *Value) bool {
    	v_1 := v.Args[1]
    	v_0 := v.Args[0]
    	// match: (XORL (SHLL (MOVLconst [1]) y) x)
    	// result: (BTCL x y)
    	for {
    		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
    			if v_0.Op != OpAMD64SHLL {
    				continue
    			}
    			y := v_0.Args[1]
    			v_0_0 := v_0.Args[0]
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Mar 12 19:38:41 UTC 2024
    - 712.7K bytes
    - Viewed (0)
  3. src/cmd/compile/internal/ssa/opGen.go

    			inputs: []inputInfo{
    				{0, 49151}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
    				{1, 49151}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
    			},
    		},
    	},
    	{
    		name:         "BTCL",
    		argLen:       2,
    		resultInArg0: true,
    		clobberFlags: true,
    		asm:          x86.ABTCL,
    		reg: regInfo{
    			inputs: []inputInfo{
    				{0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu May 23 15:49:20 UTC 2024
    - 1M bytes
    - Viewed (0)
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