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Results 1 - 8 of 8 for 1x32x32x16xf32 (0.22 sec)
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tensorflow/compiler/mlir/lite/tests/decompose-hybrid-quantization.mlir
func.return %2 : tensor<1x32x32x16xf32> } // ----- // CHECK-LABEL: @test_conv2d_qi8
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu May 02 09:41:17 UTC 2024 - 13.1K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/constant-fold.mlir
// RUN: tf-opt %s -canonicalize | FileCheck %s // CHECK-LABEL: func @testShape func.func @testShape(tensor<f32>, tensor<1x32x32x16xf32>, tensor<*xf32>) -> (tensor<0xi32>, tensor<?xi32>, tensor<?xi32>) { ^bb0(%arg0: tensor<f32>, %arg1: tensor<1x32x32x16xf32>, %arg2: tensor<*xf32>): // CHECK-DAG: tf.Const{{.*}} dense<> : tensor<0xi32> %0 = "tf.Shape"(%arg0) {T = "tfdtype$DT_FLOAT", output = "tfdtype$DT_INT32"} : (tensor<f32>) -> tensor<0xi32>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Wed Jan 31 23:22:24 UTC 2024 - 36.7K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/stablehlo/tests/odml-to-stablehlo-smuggle-resize.mlir
// CHECK-OPT: %{{.*}} = stablehlo.custom_call @tf.ResizeBilinear(%arg0, %cst) {align_corners = false, device = "", half_pixel_centers = true} : (tensor<1x32x32x128xf32>, tensor<2xi32>) -> tensor<1x64x64x128xf32> %1 = "tf.ResizeBilinear"(%arg0, %0) {
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Sun Apr 14 18:33:43 UTC 2024 - 1.4K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/tests/ops.mlir
"tfl.yield"(%4, %5, %6, %7) : (tensor<1x32x32x32xf32>, tensor<1x32x32x32xf32>, tensor<1x32x32x32xf32>, tensor<1x32x32x32xf32>) -> () }) : (tensor<1x64x64x32xf32>, tensor<1x64x64x32xf32>, tensor<1x64x64x32xf32>) -> (tensor<1x32x32x32xf32>, tensor<1x32x32x32xf32>, tensor<1x32x32x32xf32>, tensor<1x32x32x32xf32>)
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Jun 06 19:09:08 UTC 2024 - 189.2K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/stablehlo/tests/composite-lowering.mlir
// CHECK-DAG: %[[VAL_5:.*]] = arith.constant dense<[0, 3, 1, 2]> : tensor<4xi32> // CHECK-DAG: %[[VAL_6:.*]] = "tfl.transpose"(%[[VAL_4]], %[[VAL_5]]) : (tensor<1x32x32x64xf32>, tensor<4xi32>) -> tensor<1x64x32x32xf32> // CHECK: return %[[VAL_6]] : tensor<1x64x32x32xf32> // CHECK: }
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Jun 06 18:45:51 UTC 2024 - 32.6K bytes - Viewed (0) -
tensorflow/compiler/mlir/tf2xla/tests/legalize-tf.mlir
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Mon May 06 18:46:23 UTC 2024 - 335.5K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/tests/optimize.mlir
%cst_0 = arith.constant dense<3.0> : tensor<f32> %cst_1 = arith.constant dense<0.166666666> : tensor<f32> %w = arith.constant dense<1.0> : tensor<1x3x3x16xf32> %b = arith.constant dense<10.0> : tensor<16xf32> %2 = "tfl.add"(%arg0, %cst_0) {fused_activation_function = "RELU6"} : (tensor<1x112x112x16xf32>, tensor<f32>) -> tensor<1x112x112x16xf32>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu May 16 20:31:41 UTC 2024 - 284.1K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/shape_inference.mlir
// CHECK-LABEL: func @conv2d_dynamic_batch func.func @conv2d_dynamic_batch(%arg0: tensor<?x32x32x3xf32>, %arg1: tensor<3x3x3x16xf32>) -> tensor<*xf32> { // CHECK: "tf.Conv2D" // CHECK-SAME: -> tensor<?x32x32x16xf32> %0 = "tf.Conv2D"(%arg0, %arg1) {padding = "SAME", strides = [1, 1, 1, 1]} : (tensor<?x32x32x3xf32>, tensor<3x3x3x16xf32>) -> tensor<*xf32> func.return %0 : tensor<*xf32> }
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Tue Jan 23 17:24:10 UTC 2024 - 167.4K bytes - Viewed (0)