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Results 1 - 10 of 17 for ACMP (0.06 sec)
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src/cmd/asm/internal/arch/ppc64.go
return false } // IsPPC64CMP reports whether the op (as defined by an ppc64.A* constant) is // one of the CMP instructions that require special handling. func IsPPC64CMP(op obj.As) bool { switch op { case ppc64.ACMP, ppc64.ACMPU, ppc64.ACMPW, ppc64.ACMPWU, ppc64.AFCMPO, ppc64.AFCMPU: return true } return false } // IsPPC64NEG reports whether the op (as defined by an ppc64.A* constant) is
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri May 17 21:53:50 UTC 2024 - 2.2K bytes - Viewed (0) -
src/cmd/internal/obj/arm/obj5.go
p.From.Type = obj.TYPE_MEM p.From.Reg = REGG p.From.Offset = 4 * int64(ctxt.Arch.PtrSize) // G.panic p.To.Type = obj.TYPE_REG p.To.Reg = REG_R1 p = obj.Appendp(p, newprog) p.As = ACMP p.From.Type = obj.TYPE_CONST p.From.Offset = 0 p.Reg = REG_R1 // B.NE checkargp bne := obj.Appendp(p, newprog) bne.As = ABNE bne.To.Type = obj.TYPE_BRANCH
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Nov 20 17:19:36 UTC 2023 - 21.4K bytes - Viewed (0) -
src/cmd/internal/obj/arm64/obj7.go
p = c.ctxt.StartUnsafePoint(p, c.newprog) q := (*obj.Prog)(nil) if framesize <= abi.StackSmall { // small stack: SP < stackguard // CMP stackguard, SP p = obj.Appendp(p, c.newprog) p.As = ACMP p.From.Type = obj.TYPE_REG p.From.Reg = REGRT1 p.Reg = REGSP } else if framesize <= abi.StackBig { // large stack: SP-framesize < stackguard-StackSmall // SUB $(framesize-StackSmall), SP, RT2
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed Nov 08 05:46:32 UTC 2023 - 28.4K bytes - Viewed (0) -
src/cmd/asm/internal/arch/arm.go
} // IsARMCMP reports whether the op (as defined by an arm.A* constant) is // one of the comparison instructions that require special handling. func IsARMCMP(op obj.As) bool { switch op { case arm.ACMN, arm.ACMP, arm.ATEQ, arm.ATST: return true } return false } // IsARMSTREX reports whether the op (as defined by an arm.A* constant) is // one of the STREX-like instructions that require special handling.
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Nov 18 17:59:44 UTC 2022 - 6.1K bytes - Viewed (0) -
src/cmd/internal/obj/arm/asm5.go
{AORR, C_REG, C_REG, C_REG, 1, 4, 0, 0, 0, C_SBIT}, {AORR, C_REG, C_NONE, C_REG, 1, 4, 0, 0, 0, C_SBIT}, {AMOVW, C_REG, C_NONE, C_REG, 1, 4, 0, 0, 0, C_SBIT}, {AMVN, C_REG, C_NONE, C_REG, 1, 4, 0, 0, 0, C_SBIT}, {ACMP, C_REG, C_REG, C_NONE, 1, 4, 0, 0, 0, 0}, {AADD, C_RCON, C_REG, C_REG, 2, 4, 0, 0, 0, C_SBIT}, {AADD, C_RCON, C_NONE, C_REG, 2, 4, 0, 0, 0, C_SBIT}, {AAND, C_RCON, C_REG, C_REG, 2, 4, 0, 0, 0, C_SBIT},
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Dec 15 20:51:01 UTC 2023 - 79.4K bytes - Viewed (0) -
src/cmd/internal/obj/s390x/a.out.go
// convert from uint32/uint64 to float/float64 ACELFBR ACDLFBR ACELGBR ACDLGBR // convert from float/float64 to uint32/uint64 ACLFEBR ACLFDBR ACLGEBR ACLGDBR // compare ACMP ACMPU ACMPW ACMPWU // test under mask ATMHH ATMHL ATMLH ATMLL // insert program mask AIPM // set program mask ASPM // compare and swap ACS
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Sep 05 16:41:03 UTC 2023 - 12.4K bytes - Viewed (0) -
src/cmd/compile/internal/ppc64/ssa.go
ssa.OpPPC64LoweredAtomicLoad64, ssa.OpPPC64LoweredAtomicLoadPtr: // SYNC // MOVB/MOVD/MOVW (Rarg0), Rout // CMP Rout,Rout // BNE 1(PC) // ISYNC ld := ppc64.AMOVD cmp := ppc64.ACMP switch v.Op { case ssa.OpPPC64LoweredAtomicLoad8: ld = ppc64.AMOVBZ case ssa.OpPPC64LoweredAtomicLoad32: ld = ppc64.AMOVWZ cmp = ppc64.ACMPW } arg0 := v.Args[0].Reg()
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 22 19:59:38 UTC 2024 - 55.4K bytes - Viewed (0) -
src/cmd/asm/internal/arch/arm64.go
} // IsARM64CMP reports whether the op (as defined by an arm64.A* constant) is // one of the comparison instructions that require special handling. func IsARM64CMP(op obj.As) bool { switch op { case arm64.ACMN, arm64.ACMP, arm64.ATST, arm64.ACMNW, arm64.ACMPW, arm64.ATSTW, arm64.AFCMPS, arm64.AFCMPD, arm64.AFCMPES, arm64.AFCMPED: return true } return false }
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Sep 29 09:04:58 UTC 2022 - 10.4K bytes - Viewed (0) -
src/cmd/internal/obj/s390x/objz.go
q.From.Type = obj.TYPE_MEM q.From.Reg = REGG q.From.Offset = 4 * int64(c.ctxt.Arch.PtrSize) // G.panic q.To.Type = obj.TYPE_REG q.To.Reg = REG_R3 q = obj.Appendp(q, c.newprog) q.As = ACMP q.From.Type = obj.TYPE_REG q.From.Reg = REG_R3 q.To.Type = obj.TYPE_CONST q.To.Offset = 0 q = obj.Appendp(q, c.newprog) q.As = ABEQ q.To.Type = obj.TYPE_BRANCH p1 := q
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Apr 21 19:28:53 UTC 2023 - 21K bytes - Viewed (0) -
src/cmd/internal/obj/arm64/asm7.go
{AADD, C_VCON, C_RSP, C_NONE, C_RSP, C_NONE, 13, 20, 0, 0, 0}, {AADD, C_VCON, C_NONE, C_NONE, C_RSP, C_NONE, 13, 20, 0, 0, 0}, {ACMP, C_MOVCON2, C_ZREG, C_NONE, C_NONE, C_NONE, 13, 12, 0, 0, 0}, {ACMP, C_MOVCON3, C_ZREG, C_NONE, C_NONE, C_NONE, 13, 16, 0, 0, 0}, {ACMP, C_VCON, C_ZREG, C_NONE, C_NONE, C_NONE, 13, 20, 0, 0, 0}, {AADD, C_SHIFT, C_ZREG, C_NONE, C_ZREG, C_NONE, 3, 4, 0, 0, 0},
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 15 15:44:14 UTC 2024 - 201.1K bytes - Viewed (0)