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Results 1 - 10 of 11 for 1x64x64x32xf32 (0.44 sec)
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tensorflow/compiler/mlir/lite/tests/ops.mlir
} // ----- func.func @testTFLiteDetectionPostProcess(%arg0: tensor<1x64x64x32xf32>, %arg1: tensor<1x64x64x32xf32>, %arg2: tensor<1x64x64x32xf32>) -> (tensor<1x32x32x32xf32>, tensor<1x32x32x32xf32>) { %0, %1, %2, %3 = "tfl.custom_tf"(%arg0, %arg1, %arg2) ({ ^bb0(%a0: tensor<1x64x64x32xf32>, %a1: tensor<1x64x64x32xf32>, %a2: tensor<1x64x64x32xf32>):
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Jun 06 19:09:08 UTC 2024 - 189.2K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/stablehlo/tests/odml-to-stablehlo-smuggle-resize.mlir
// CHECK-OPT: %{{.*}} = stablehlo.custom_call @tf.ResizeBilinear(%arg0, %cst) {align_corners = false, device = "", half_pixel_centers = true} : (tensor<1x32x32x128xf32>, tensor<2xi32>) -> tensor<1x64x64x128xf32> %1 = "tf.ResizeBilinear"(%arg0, %0) { align_corners = false, device = "", half_pixel_centers = true
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Sun Apr 14 18:33:43 UTC 2024 - 1.4K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/tests/mlir2flatbuffer/transpose_conv_optional.mlir
func.return %0 : tensor<1x64x84x32xf32>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Wed Dec 14 04:58:17 UTC 2022 - 2.8K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/tests/flatbuffer2mlir/custom_op.mlir
%0 = "tfl.custom"(%arg0, %arg1, %arg2) {custom_code = "Convolution2DTransposeBias", custom_option = #tfl<const_bytes : "0x010000000200000002000000">} : (tensor<32x4x4x128xf32>, tensor<1x32x42x128xf32>, tensor<4xi32>) -> tensor<1x64x84x32xf32> func.return %0 : tensor<1x64x84x32xf32> } // CHECK-LABEL: main
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu May 02 09:41:17 UTC 2024 - 827 bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/tests/flatbuffer2mlir/custom_op_offset.mlir
%0 = "tfl.custom"(%arg0, %arg1, %arg2) {custom_code = "Convolution2DTransposeBias", custom_option = #tfl<const_bytes : "0x010000000200000002000000">} : (tensor<32x4x4x128xf32>, tensor<1x32x42x128xf32>, tensor<4xi32>) -> tensor<1x64x84x32xf32> func.return %0 : tensor<1x64x84x32xf32> } // CHECK-LABEL: main
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu May 02 09:41:17 UTC 2024 - 847 bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/stablehlo/tests/tf-tfl-translate-serialize-stablehlo-resize-bilinear.mlir
module { func.func @main(%arg0: tensor<21x32x32x128xf32>, %arg1: tensor<2xi32>) -> tensor<1x64x64x128xf32> { %0 = "tf.ResizeBilinear"(%arg0, %arg1) {align_corners = false, device = "", half_pixel_centers = true} : (tensor<21x32x32x128xf32>, tensor<2xi32>) -> tensor<1x64x64x128xf32> func.return %0 : tensor<1x64x64x128xf32> }
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Mar 02 06:04:37 UTC 2023 - 455 bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/stablehlo/tests/composite-lowering.mlir
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Jun 06 18:45:51 UTC 2024 - 32.6K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/tests/get-arithmetic-count.mlir
%cst = "tfl.no_value"() {value = unit} : () -> none // CHECK: _arithmetic_count = 176160768 : i64 %0 = "tfl.transpose_conv"(%arg0, %arg1, %arg2, %cst) {padding = "SAME", stride_h = 2 : i32, stride_w = 2 : i32, fused_activation_function = "NONE"} : (tensor<4xi32>, tensor<32x4x4x128xf32>, tensor<1x32x42x128xf32>, none) -> tensor<1x64x84x32xf32> func.return %0 : tensor<1x64x84x32xf32> }
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Wed Dec 14 04:58:17 UTC 2022 - 7.7K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/tests/optimize.mlir
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu May 16 20:31:41 UTC 2024 - 284.1K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/tests/dilated-conv.mlir
%cst_1 = arith.constant dense<0> : tensor<2x2xi32> %0 = "tf.SpaceToBatchND"(%arg0, %cst, %cst_1) : (tensor<1x128x128x3xf32>, tensor<2xi32>, tensor<2x2xi32>) -> tensor<4x64x64x3xf32> %1 = "tf.Conv2D"(%0, %arg1) {padding = "VALID", strides = [1, 1, 1, 1]} : (tensor<4x64x64x3xf32>, tensor<5x5x3x8xf32>) -> tensor<4x60x60x8xf32> %2 = "tf.BatchToSpaceND"(%1, %cst, %cst_1) : (tensor<4x60x60x8xf32>, tensor<2xi32>, tensor<2x2xi32>) -> tensor<1x120x120x8xf32>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Mon Oct 30 06:52:55 UTC 2023 - 44.7K bytes - Viewed (0)