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Results 1 - 10 of 75 for tconv (0.05 sec)

  1. tensorflow/compiler/mlir/lite/tests/quantize-dynamic-range.mlir

    // CHECK: %[[conv:.*]] = "tfl.conv_2d"(%arg0, %[[w3]], %[[b]])
    // CHECK: %[[dconv:.*]] = "tfl.depthwise_conv_2d"(%arg0, %[[w2]], %[[b]])
    // CHECK: %[[emb:.*]] = "tfl.gather"(%[[dq_w1]], %arg1)
    // CHECK: %[[bmm:.*]] = "tfl.batch_matmul"(%[[conv]], %[[dconv]]) <{adj_x = false, adj_y = true
    // CHECK-NOT: , asymmetric_quantize_inputs = true
    // CHECK-SAME: }
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu May 23 21:09:00 UTC 2024
    - 23.2K bytes
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  2. tensorflow/compiler/mlir/lite/tests/prepare-quantize-dynamic-range.mlir

    // CHECK-DAG: %[[dq_w1:.*]] = "tfl.dequantize"(%[[q_w1]])
    // CHECK-DAG: %[[dq_w2:.*]] = "tfl.dequantize"(%[[q_w2]])
    // CHECK: %[[conv:.*]] = "tfl.conv_2d"(%arg0, %[[dq_w2]], %[[b]])
    // CHECK: %[[dconv:.*]] = "tfl.depthwise_conv_2d"(%arg0, %[[dq_w1]], %[[b]])
    // CHECK: %[[bmm:.*]] = "tfl.batch_matmul"(%[[conv]], %[[dconv]]) <{adj_x = false, adj_y = true
    // CHECK-NOT: , asymmetric_quantize_inputs = true
    // CHECK-SAME: }
    // CHECK: return %[[bmm:.*]]
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu May 02 09:41:17 UTC 2024
    - 38.2K bytes
    - Viewed (0)
  3. src/cmd/internal/obj/util.go

    // as long as they register proper cconv function for it.
    type opSuffixSet struct {
    	arch  string
    	cconv func(suffix uint8) string
    }
    
    var opSuffixSpace []opSuffixSet
    
    // RegisterOpSuffix assigns cconv function for formatting opcode suffixes
    // when compiling for GOARCH=arch.
    //
    // cconv is never called with 0 argument.
    func RegisterOpSuffix(arch string, cconv func(uint8) string) {
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 15 15:44:14 UTC 2024
    - 17.5K bytes
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  4. tensorflow/compiler/mlir/quantization/stablehlo/tests/pipelines/process_nchw_tensor.mlir

    // CHECK: %[[CONV:.+]] = stablehlo.convolution(%[[TRANSPOSE_0]], %[[CONST]]) dim_numbers = [b, 0, 1, f]x[0, 1, i, o]->[b, 0, 1, f], window = {pad = {{\[\[}}1, 1], [1, 1]]} {batch_group_count = 1 : i64, feature_group_count = 1 : i64} : (tensor<1x4x4x8xf32>, tensor<3x3x8x8xf32>) -> tensor<1x4x4x8xf32>
    // CHECK: %[[TRANSPOSE_1:.+]] = stablehlo.transpose %[[CONV]], dims = [0, 3, 1, 2] : (tensor<1x4x4x8xf32>) -> tensor<1x8x4x4xf32>
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu Apr 18 20:32:46 UTC 2024
    - 12.6K bytes
    - Viewed (0)
  5. src/cmd/compile/internal/walk/assign.go

    	// if uint(newLen) <= uint(oldCap)
    	nif := ir.NewIfStmt(base.Pos, nil, nil, nil)
    	nuint := typecheck.Conv(newLen, types.Types[types.TUINT])
    	scapuint := typecheck.Conv(oldCap, types.Types[types.TUINT])
    	nif.Cond = ir.NewBinaryExpr(base.Pos, ir.OLE, nuint, scapuint)
    	nif.Likely = true
    
    	// then { s = s[:newLen] }
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 08 17:09:06 UTC 2024
    - 20.3K bytes
    - Viewed (0)
  6. tensorflow/compiler/mlir/quantization/stablehlo/tests/components/tf_to_stablehlo.mlir

    // CHECK-DAG: %[[CONV:.*]] = stablehlo.convolution(%[[ARG]], %[[CONST_1]]) {{.*}} : (tensor<1x3x4x3xf32>, tensor<2x3x3x2xf32>) -> tensor<1x3x2x2xf32>
    // CHECK-DAG: %[[BROADCAST:.*]] = stablehlo.broadcast_in_dim %[[CONST_0]], dims = [3] : (tensor<2xf32>) -> tensor<1x3x2x2xf32>
    // CHECK-DAG: %[[ADD:.*]] = stablehlo.add %[[CONV]], %[[BROADCAST]] : tensor<1x3x2x2xf32>
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Mon Apr 08 20:05:12 UTC 2024
    - 13.6K bytes
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  7. tensorflow/compiler/mlir/quantization/stablehlo/tests/passes/lift_quantizable_spots_as_functions.mlir

    // CHECK: }
    
    // CHECK-LABEL: private @composite_conv_with_bias_dynamic_fn_1
    // CHECK: %[[CONV:.*]] = stablehlo.convolution(%arg0, %arg1)
    // CHECK: %[[SHAPE_OF:.*]] = shape.shape_of %[[CONV]]
    // CHECK: %[[DYNAMIC_BROADCAST_IN_DIM:.*]] = stablehlo.dynamic_broadcast_in_dim %arg2, %[[SHAPE_OF]]
    // CHECK: %[[ADD:.*]] = stablehlo.add %[[CONV]], %[[DYNAMIC_BROADCAST_IN_DIM]]
    // CHECK: return %[[ADD]] : tensor<?x28x28x16xf32>
    // CHECK: }
    
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Fri May 10 04:07:09 UTC 2024
    - 49.8K bytes
    - Viewed (0)
  8. tensorflow/compiler/mlir/tensorflow/transforms/fused_kernel_matcher.cc

      // attribute which is shared.
      bool AreFuseCompatible(Conv2DOp conv, BiasAddOp bias_add,
                             PatternRewriter &rewriter) const override {
        // Verify that the data formats match and are valid for fusion.
        if (conv.getDataFormat() != bias_add.getDataFormat()) {
          (void)rewriter.notifyMatchFailure(conv, [&](Diagnostic &diag) {
            diag << "data format does not match Conv2D data format ("
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu Apr 25 16:01:03 UTC 2024
    - 14.9K bytes
    - Viewed (0)
  9. tensorflow/compiler/mlir/quantization/tensorflow/tests/quantize.mlir

      %conv = "tf.Conv2D"(%dq_input, %dq_weight) {attr_map = "0:strides,1:use_cudnn_on_gpu,2:padding,3:explicit_paddings,4:dilations", data_format = "NHWC", device = "", dilations = [1, 1, 1, 1], explicit_paddings = [], padding = "VALID", strides = [1, 1, 2, 1], use_cudnn_on_gpu = true} : (tensor<1x3x4x3xf32>, tensor<2x3x3x2xf32>) -> tensor<*xf32>
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Wed May 08 19:32:28 UTC 2024
    - 6.4K bytes
    - Viewed (0)
  10. tensorflow/compiler/mlir/quantization/tensorflow/tests/quantize_xla.mlir

      %conv = "tf.Conv2D"(%dq_input, %dq_weight) {attr_map = "0:strides,1:use_cudnn_on_gpu,2:padding,3:explicit_paddings,4:dilations", data_format = "NHWC", device = "", dilations = [1, 1, 1, 1], explicit_paddings = [], padding = "VALID", strides = [1, 1, 2, 1], use_cudnn_on_gpu = true} : (tensor<1x3x4x3xf32>, tensor<2x3x3x2xf32>) -> tensor<*xf32>
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Wed May 08 19:32:28 UTC 2024
    - 11.4K bytes
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