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Results 1 - 6 of 6 for r3 (0.01 sec)

  1. src/cmd/asm/internal/asm/testdata/s390x.s

    	MOVW	R1, 4095(R2)(R3)       // 50132fff
    	MOVW	R1, 4096(R2)(R3)       // e31320000150
    	MOVWZ	R1, 4095(R2)(R3)       // 50132fff
    	MOVWZ	R1, 4096(R2)(R3)       // e31320000150
    	MOVH	R1, 4095(R2)(R3)       // 40132fff
    	MOVHZ   R1, 4095(R2)(R3)       // 40132fff
    	MOVH	R1, 4096(R2)(R3)       // e31320000170
    	MOVHZ	R1, 4096(R2)(R3)       // e31320000170
    	MOVB	R1, 4095(R2)(R3)       // 42132fff
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Wed Sep 18 15:49:24 UTC 2024
    - 22.1K bytes
    - Viewed (0)
  2. src/cmd/asm/internal/asm/testdata/armerror.s

    	BFX.S	$2, $4, R3         // ERROR "invalid .S suffix"
    	BFXU.W	$2, $4, R3, R0     // ERROR "invalid .W suffix"
    	MOVB.S	R1, 4(R2)          // ERROR "invalid .S suffix"
    	MOVHU.S	R1, 4(R2)          // ERROR "invalid .S suffix"
    	MOVW.S	R1, 4(R2)          // ERROR "invalid .S suffix"
    	MOVBU.S	4(R2), R3          // ERROR "invalid .S suffix"
    	MOVH.S	4(R2), R3          // ERROR "invalid .S suffix"
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Wed Oct 23 15:18:14 UTC 2024
    - 14.5K bytes
    - Viewed (0)
  3. src/cmd/asm/internal/asm/testdata/ppc64.s

    	CMPU R3, R0                     // 7c230040
    	CMPU R3, R0, CR2                // CMPU R3,CR2,R0  // 7d230040
    	CMPW R3, R4                     // 7c032000
    	CMPW R3, R0                     // 7c030000
    	CMPW R3, R0, CR3                // CMPW R3,CR3,R0  // 7d830000
    	CMPWU R3, R4                    // 7c032040
    	CMPWU R3, R0                    // 7c030040
    	CMPWU R3, R0, CR4               // CMPWU R3,CR4,R0 // 7e030040
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Tue Oct 29 13:14:38 UTC 2024
    - 51K bytes
    - Viewed (0)
  4. src/cmd/asm/internal/asm/testdata/armv6.s

    	MOVFD	F0, F1        // c01ab7ee
    	MOVDF	F4, F5        // c45bb7ee
    
    	LDREX	(R8), R9      // 9f9f98e1
    	LDREXB	(R11), R12    // 9fcfdbe1
    	LDREXD	(R11), R12    // 9fcfbbe1
    	STREX	R3, (R4), R5  // STREX  (R4), R3, R5 // 935f84e1
    	STREXB	R8, (R9), g   // STREXB (R9), R8, g  // 98afc9e1
    	STREXD	R8, (R9), g   // STREXD (R9), R8, g  // 98afa9e1
    
    	CMPF    F8, F9        // c89ab4ee10faf1ee
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Wed Oct 23 15:18:14 UTC 2024
    - 4.7K bytes
    - Viewed (0)
  5. compat/maven-compat/src/test/java/org/apache/maven/artifact/repository/MavenArtifactRepositoryTest.java

            MavenArtifactRepositorySubclass r3 = new MavenArtifactRepositorySubclass("bar");
    
            assertTrue(r1.hashCode() == r2.hashCode());
            assertFalse(r1.hashCode() == r3.hashCode());
    
            assertTrue(r1.equals(r2));
            assertTrue(r2.equals(r1));
    
            assertFalse(r1.equals(r3));
            assertFalse(r3.equals(r1));
        }
    Registered: Sun Nov 03 03:35:11 UTC 2024
    - Last Modified: Fri Oct 25 12:31:46 UTC 2024
    - 1.9K bytes
    - Viewed (0)
  6. src/cmd/asm/internal/asm/parse.go

    		}
    		// fmt.Printf("SYM %s\n", obj.Dconv(&emptyProg, 0, a))
    		if p.peek() == scanner.EOF {
    			return
    		}
    	}
    
    	// Special register list syntax for arm: [R1,R3-R7]
    	if tok.ScanToken == '[' {
    		if prefix != 0 {
    			p.errorf("illegal use of register list")
    		}
    		p.registerList(a)
    		p.expectOperandEnd()
    		return
    	}
    
    	// Register: R1
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Wed Sep 04 18:16:59 UTC 2024
    - 36.9K bytes
    - Viewed (0)
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