&& registerizable(b, t3)
	&& registerizable(b, t4)
	&& registerizable(b, t5)
	&& o4 == t5.Size()
	&& o3-o4 == t4.Size()
	&& o2-o3 == t3.Size()
	&& n == t2.Size() + t3.Size() + t4.Size() + t5.Size()
	=> (Store {t2} (OffPtr <tt2> [o2] dst) d1
		(Store {t3} (OffPtr <tt3> [o3] dst) d2
			(Store {t4} (OffPtr <tt4> [o4] dst) d3
				(Store {t5} (OffPtr <tt5> [0] dst) d4 mem))))

000000e0  30 05 06 03 2b 65 70 03  21 00 3f e2 15 2e e6 e3  |0...+ep.!.?.....|
000000f0  ef 3f 4e 85 4a 75 77 a3  64 9e ed e0 bf 84 2c cc  |.?N.Juw.d.....,.|
00000100  92 26 8f fa 6f 34 83 aa  ec 8f a3 4d 30 4b 30 0e  |.&..o4.....M0K0.|
00000110  06 03 55 1d 0f 01 01 ff  04 04 03 02 05 a0 30 13  |..U...........0.|
00000120  06 03 55 1d 25 04 0c 30  0a 06 08 2b 06 01 05 05  |..U.%..0...+....|

		o4 = OP_12IRR(c.opirr(ALU52ID), uint32(v>>52), uint32(p.To.Reg), uint32(p.To.Reg))

	case 60: // add $dcon,r1,r2
		v := c.vregoff(&p.From)
		o1 = OP_IR(c.opir(ALU12IW), uint32(v>>12), uint32(REGTMP))
		o2 = OP_12IRR(c.opirr(AOR), uint32(v), uint32(REGTMP), uint32(REGTMP))
		o3 = OP_IR(c.opir(ALU32ID), uint32(v>>32), uint32(REGTMP))

00000110  a1 53 28 09 cd 1c 1d a0  24 77 e3 e6 4d b1 8f 36  |.S(.....$w..M..6|
00000120  43 29 79 b3 e2 fb 9e dc  39 90 b5 b7 db 6d 0a c0  |C)y.....9....m..|
00000130  55 d2 1c fd 8d 57 5b bf  e3 70 b7 6a bc af 4f 34  |U....W[..p.j..O4|
00000140  e7 e1 46 d3 9a cc e4 73  33 fb e6 ad f9 b5 35 af  |..F....s3.....5.|
00000150  97 77 88 11 19 7c e6 7d  8b 08 bb 78 2c 50 29 0c  |.w...|.}...x,P).|

		return uint16((d >> 16) + 1)
	}
	return uint16(d >> 16)
}

func asmout(c *ctxt9, p *obj.Prog, o *Optab, out *[5]uint32) {
	o1 := uint32(0)
	o2 := uint32(0)
	o3 := uint32(0)
	o4 := uint32(0)
	o5 := uint32(0)

	//print("%v => case %d\n", p, o->type);
	switch o.type_ {
	default:
		c.ctxt.Diag("unknown type %d", o.type_)
		prasm(p)

	case 0: /* pseudo ops */
		break

		}
	default:
		panic("invalid operation")
	}
}

func (c *ctxt7) asmout(p *obj.Prog, o *Optab, out []uint32) {
	var os [5]uint32
	o1 := uint32(0)
	o2 := uint32(0)
	o3 := uint32(0)
	o4 := uint32(0)
	o5 := uint32(0)
	if false { /*debug['P']*/
		fmt.Printf("%x: %v\ttype %d\n", uint32(p.Pc), p, o.type_)
	}
	switch o.type_ {
	default:
		c.ctxt.Diag("%v: unknown asm %d", p, o.type_)

re(e),e.raws.before=this.calcBefore(r,e))}old(e,t){return[this.prefixed(e,t)]}};Sm.exports=km});var Am=v((a4,Cm)=>{l();Cm.exports=function i(e){return{mul:t=>new i(e*t),div:t=>new i(e/t),simplify:()=>new i(e),toString:()=>e.toString()}}});var Em=v((o4,Om)=>{l();var M2=Am(),B2=Ut(),Wo=le(),F2=/(min|max)-resolution\s*:\s*\d*\.?\d+(dppx|dpcm|dpi|x)/gi,L2=/(min|max)-resolution(\s*:\s*)(\d*\.?\d+)(dppx|dpcm|dpi|x)/i,_m=class extends B2{prefixName(e,t){return e==="-moz-"?t+"--moz-device-pixel-ratio":e...